| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 189 bool isZExt);
912 Opc = isZExt ? ARM::t2LDRBi8 : ARM::t2LDRSBi8; in ARMEmitLoad()
916 if (isZExt) { in ARMEmitLoad()
932 Opc = isZExt ? ARM::t2LDRHi8 : ARM::t2LDRSHi8; in ARMEmitLoad()
936 Opc = isZExt ? ARM::LDRH : ARM::LDRSH; in ARMEmitLoad()
1338 bool isZExt) { in ARMEmitCmp() argument
2607 bool isZExt) { in ARMEmitIntExt() argument
2752 bool isZExt = isa<ZExtInst>(I); in SelectIntExt() local
2902 uint8_t isZExt : 1; member
2932 bool isZExt; in tryToFoldLoadIntoMI() local
[all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | MachineFrameInfo.h | 177 bool isZExt = false; member
537 return Objects[ObjectIdx+NumFixedObjects].isZExt; in isObjectZExt()
543 Objects[ObjectIdx+NumFixedObjects].isZExt = IsZExt; in setObjectZExt()
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| H A D | TargetCallingConv.h | 73 bool isZExt() const { return IsZExt; } in isZExt() function
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCMachineFunctionInfo.cpp | 72 return LiveIn.second.isZExt(); in isLiveInZExt()
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| H A D | PPCFastISel.cpp | 158 bool isZExt, unsigned DestReg,
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| H A D | PPCISelLowering.cpp | 4372 else if (Flags.isZExt()) in extendArgForPPC64()
6994 else if (Flags.isZExt()) in truncateScalarIntegerArg()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsFastISel.cpp | 183 unsigned emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt);
1750 if (Outs[0].Flags.isZExt() || Outs[0].Flags.isSExt()) { in selectRet()
1751 bool IsZExt = Outs[0].Flags.isZExt(); in selectRet()
1800 bool isZExt = isa<ZExtInst>(I); in selectIntExt() local
1817 if (!emitIntExt(SrcVT, SrcReg, DestVT, ResultReg, isZExt)) in selectIntExt()
1903 bool isZExt) { in emitIntExt() argument
1905 bool Success = emitIntExt(SrcVT, SrcReg, DestVT, DestReg, isZExt); in emitIntExt()
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| H A D | MipsISelLowering.cpp | 2897 else if (ArgFlags.isZExt()) in CC_MipsO32()
2909 else if (ArgFlags.isZExt()) in CC_MipsO32()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 391 !Flags.isZExt()) { in lowerReturn()
678 if (!Flags.isZExt() && !Flags.isSExt()) { in lowerFormalArguments()
1236 if (OrigArg.Ty->isIntegerTy(1) && !Flags.isSExt() && !Flags.isZExt()) { in lowerCall()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CallLowering.cpp | 375 } else if (Flags.isZExt()) { in buildCopyFromRegs()
625 if (Flags.isZExt()) in extendOpFromFlags()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallingConv.td | 16 : CCIf<"ArgFlags.isSExt() || ArgFlags.isZExt()", A>;
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| H A D | AMDGPUCallLowering.cpp | 334 } else if (RetInfo.Flags[0].isZExt()) { in lowerReturnVal()
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| H A D | SIISelLowering.cpp | 1963 if (Arg && (Arg->Flags.isSExt() || Arg->Flags.isZExt()) && in convertArgType()
1965 unsigned Opc = Arg->Flags.isZExt() ? ISD::AssertZext : ISD::AssertSext; in convertArgType()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZCallingConv.td | 12 : CCIf<"ArgFlags.isSExt() || ArgFlags.isZExt()", A>;
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 233 unsigned emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt);
234 unsigned emiti1Ext(unsigned SrcReg, MVT DestVT, bool isZExt);
3906 if (!Outs[0].Flags.isZExt() && !Outs[0].Flags.isSExt()) in selectRet()
3909 bool IsZExt = Outs[0].Flags.isZExt(); in selectRet()
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| H A D | AArch64ISelLowering.cpp | 6908 if (!Ins[i].Flags.isZExt()) { in LowerFormalArguments()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 382 else if (ArgFlags.isZExt()) in CC_Lanai32_VarArg()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 509 else if (ArgFlags.isZExt()) in AnalyzeArguments()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FastISel.cpp | 1250 if (!Outs[0].Flags.isZExt() && !Outs[0].Flags.isSExt()) in X86SelectRet()
1262 unsigned Op = Outs[0].Flags.isZExt() ? ISD::ZERO_EXTEND : in X86SelectRet()
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| H A D | X86ISelLoweringCall.cpp | 2693 if (Flags.isZExt() != MFI.isObjectZExt(FI) || in MatchingStackOffset()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 372 if (Flags.isZExt() != MFI.isObjectZExt(FI) || in MatchingStackOffset()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 17788 (BitWidth < 32 && In.Flags.isZExt())) { in unpackFromRegLoc()
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