Searched refs:isVALU (Results 1 – 9 of 9) sorted by relevance
173 return SIInstrInfo::isVALU(MI) && in isLdsDma()349 if (SIInstrInfo::isVALU(*MI)) in PreEmitNoopsCommon()680 return TII.isVALU(MI); in checkSMRDHazards()725 return TII.isVALU(MI); in checkVMEMHazards()748 return TII->isVALU(MI); in checkDPPHazards()777 return TII->isVALU(MI); in checkDivFMasHazards()1196 if (!SIInstrInfo::isVALU(*MI)) in fixSMEMtoVectorWriteHazards()1283 if (!SIInstrInfo::isVALU(*MI)) in fixVcmpxExecWARHazard()1291 if (SIInstrInfo::isVALU(I)) in fixVcmpxExecWARHazard()1415 if (!SIInstrInfo::isVALU(I)) in fixLdsDirectVALUHazard()[all …]
141 } else if (SIInstrInfo::isVALU(MI)) { in runOnMachineFunction()173 while (I != E && !SIInstrInfo::isVALU(*I) && !I->isTerminator()) in runOnMachineFunction()
104 if (AllProducerOperandsAreSingleUse && SIInstrInfo::isVALU(MI)) { in runOnMachineFunction()
909 bool isVALU(const SUnit *SU) const { in isVALU() function911 return MI && TII->isVALU(*MI); in isVALU()935 if (SUv != From && SU != &DAG->ExitSU && isVALU(SUv) && in linkSALUChain()
416 static bool isVALU(const MachineInstr &MI) { in isVALU() function420 bool isVALU(uint16_t Opcode) const { in isVALU() function563 return isVALU(MI) && (isMUBUF(MI) || isFLAT(MI)); in isLDSDMA()567 return isVALU(Opcode) && (isMUBUF(Opcode) || isFLAT(Opcode)); in isLDSDMA()
1439 (TII->isVALU(MI) || TII->isMFMAorWMMA(MI) || TII->isSALU(MI) || in canAddMI()1444 TII->isVALU(MI) && !TII->isMFMAorWMMA(MI) && !TII->isTRANS(MI)) in canAddMI()
383 && SIInstrInfo::isVALU(*Def); in emitIfBreak()
956 if (TRI->isSGPRReg(*MRI, Reg) && !TII->isVALU(*Inst)) in analyzeVGPRToSGPRCopy()
190 isVALU(*MO.getParent()) && !resultDependsOnExec(*MO.getParent()); in isIgnorableUse()4469 if (SIInstrInfo::isVALU(MI)) { in shouldReadExec()4781 if (isVALU(MI) && Desc.getOpcode() != AMDGPU::V_WRITELANE_B32) { in verifyInstruction()5630 if (isVALU(MI) && usesConstantBus(MRI, *MO, OpInfo)) { in isOperandLegal()8589 if (isVALU(MI) || isSALU(MI)) { in getInstSizeInBytes()