| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMAddressingModes.h | 403 bool isSub = Opc == sub; variable
404 return Imm12 | ((int)isSub << 12) | (SO << 13) | (IdxMode << 16) ;
434 bool isSub = Opc == sub; variable
435 return ((int)isSub << 8) | Offset | (IdxMode << 9);
477 bool isSub = Opc == sub; in getAM5Opc() local
478 return ((int)isSub << 8) | Offset; in getAM5Opc()
498 bool isSub = Opc == sub; in getAM5FP16Opc() local
499 return ((int)isSub << 8) | Offset; in getAM5FP16Opc()
|
| H A D | ARMInstPrinter.cpp | 376 bool isSub = OffImm < 0; in printThumbLdrLabelOperand() local
381 if (isSub) { in printThumbLdrLabelOperand()
1205 bool isSub = OffImm < 0; in printAddrModeImm12Operand() local
1209 if (isSub) { in printAddrModeImm12Operand()
1232 bool isSub = OffImm < 0; in printT2AddrModeImm8Operand() local
1236 if (isSub) { in printT2AddrModeImm8Operand()
1264 bool isSub = OffImm < 0; in printT2AddrModeImm8s4Operand() local
1271 if (isSub) { in printT2AddrModeImm8s4Operand()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | Thumb2InstrInfo.cpp | 303 bool isSub = NumBytes < 0; in emitT2RegPlusImmediate() local
304 if (isSub) NumBytes = -NumBytes; in emitT2RegPlusImmediate()
328 if (isSub) { in emitT2RegPlusImmediate()
386 Opc = isSub ? t2SUB : t2ADD; in emitT2RegPlusImmediate()
539 bool isSub = false; in rewriteT2FrameIndex() local
571 isSub = true; in rewriteT2FrameIndex()
648 isSub = true; in rewriteT2FrameIndex()
666 isSub = true; in rewriteT2FrameIndex()
680 isSub = true; in rewriteT2FrameIndex()
733 if (isSub) { in rewriteT2FrameIndex()
[all …]
|
| H A D | ThumbRegisterInfo.cpp | 146 bool isSub = false; in emitThumbRegPlusImmInReg() local
152 isSub = true; in emitThumbRegPlusImmInReg()
235 int Opc = (isSub) ? ARM::tSUBrr in emitThumbRegPlusImmInReg()
240 if (DestReg == ARM::SP || isSub) in emitThumbRegPlusImmInReg()
258 bool isSub = NumBytes < 0; in emitThumbRegPlusImmediate() local
260 if (isSub) Bytes = -NumBytes; in emitThumbRegPlusImmediate()
293 ExtraOpc = isSub ? ARM::tSUBspi : ARM::tADDspi; in emitThumbRegPlusImmediate()
299 assert(!isSub && "Thumb1 does not have tSUBrSPi"); in emitThumbRegPlusImmediate()
308 CopyOpc = isSub ? ARM::tSUBi3 : ARM::tADDi3; in emitThumbRegPlusImmediate()
316 ExtraOpc = isSub ? ARM::tSUBi8 : ARM::tADDi8; in emitThumbRegPlusImmediate()
|
| H A D | ARMBaseInstrInfo.cpp | 2636 bool isSub = false; in rewriteARMFrameIndex() local
2653 isSub = true; in rewriteARMFrameIndex()
2740 isSub = true; in rewriteARMFrameIndex()
2755 if (isSub) { in rewriteARMFrameIndex()
2768 if (isSub) { in rewriteARMFrameIndex()
3477 if (!isSub && in getNumMicroOpsSwiftLdSt()
3493 if (!isSub && in getNumMicroOpsSwiftLdSt()
3521 if (!isSub && in getNumMicroOpsSwiftLdSt()
3534 if (!isSub && in getNumMicroOpsSwiftLdSt()
3585 if (!isSub && in getNumMicroOpsSwiftLdSt()
[all …]
|
| H A D | ARMISelLowering.cpp | 12104 bool isSub = ARM_AM::getAM2Op(Offset) == ARM_AM::sub; in EmitInstrWithCustomInserter() local
12106 if (isSub) in EmitInstrWithCustomInserter()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FrameLowering.cpp | 232 bool isSub = NumBytes < 0; in emitSPUpdate() local
233 uint64_t Offset = isSub ? -NumBytes : NumBytes; in emitSPUpdate()
235 isSub ? MachineInstr::FrameSetup : MachineInstr::FrameDestroy; in emitSPUpdate()
258 if (isSub && !isEAXLiveIn(MBB)) in emitSPUpdate()
264 isSub ? getSUBrrOpcode(Is64Bit) : getADDrrOpcode(Is64Bit); in emitSPUpdate()
288 if (isSub) in emitSPUpdate()
315 unsigned Reg = isSub ? (unsigned)(Is64Bit ? X86::RAX : X86::EAX) in emitSPUpdate()
318 unsigned Opc = isSub ? (Is64Bit ? X86::PUSH64r : X86::PUSH32r) in emitSPUpdate()
321 .addReg(Reg, getDefRegState(!isSub) | getUndefRegState(isSub)) in emitSPUpdate()
328 BuildStackAdjustment(MBB, MBBI, DL, isSub ? -ThisVal : ThisVal, InEpilogue) in emitSPUpdate()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrFormats.td | 2482 let Inst{30} = isSub;
2611 let Inst{15} = isSub;
2617 multiclass MulAccum<bit isSub, string asm> {
2795 let Inst{30} = isSub;
2831 let Inst{30} = isSub;
2856 let Inst{30} = isSub;
2881 let Inst{30} = isSub;
5493 let Inst{15} = isSub;
12552 let Inst{30} = isSub;
12567 def _shift : BaseAddSubCPA<isSub, asm>;
[all …]
|
| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | GenericMachineInstrs.h | 400 bool isSub() const { return !isAdd(); } in isSub() function
|
| /freebsd-14.2/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGExprScalar.cpp | 3775 bool isSub=false) { in tryEmitFMulAdd() argument
3817 return buildFMulAdd(LHSBinOp, op.RHS, CGF, Builder, NegLHS, isSub); in tryEmitFMulAdd()
3826 return buildFMulAdd(RHSBinOp, op.LHS, CGF, Builder, isSub ^ NegRHS, false); in tryEmitFMulAdd()
3837 return buildFMulAdd(LHSBinOp, op.RHS, CGF, Builder, NegLHS, isSub); in tryEmitFMulAdd()
3847 return buildFMulAdd(RHSBinOp, op.LHS, CGF, Builder, isSub ^ NegRHS, false); in tryEmitFMulAdd()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 4739 bool ProducesNegatedCarry = CarrySrcMI->isSub(); in emitCarryIn()
|