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Searched refs:isSignedIntN (Results 1 – 25 of 26) sorted by relevance

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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZOperands.td360 return N->getAPIntValue().isSignedIntN(8);
374 return N->getAPIntValue().isSignedIntN(16);
378 return (-N->getAPIntValue()).isSignedIntN(16);
480 return N->getAPIntValue().isSignedIntN(8);
488 return N->getAPIntValue().isSignedIntN(16);
492 return (-N->getAPIntValue()).isSignedIntN(16);
500 return N->getAPIntValue().isSignedIntN(32);
504 return (-N->getAPIntValue()).isSignedIntN(32);
/freebsd-14.2/contrib/llvm-project/llvm/lib/DebugInfo/PDB/Native/
H A DNativeSymbolEnumerator.cpp83 assert(Record.Value.isSignedIntN(BT.getLength() * 8)); in getValue()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEISelDAGToDAG.cpp562 if (( Signed && ImmValue.isSignedIntN(ImmBitSize)) || in selectVSplatCommon()
1128 if (SplatValue.isSignedIntN(10)) { in trySelect()
1133 } else if (SplatValue.isSignedIntN(16) && in trySelect()
1163 } else if (SplatValue.isSignedIntN(32) && SplatBitSize == 32) { in trySelect()
1184 } else if (SplatValue.isSignedIntN(32) && SplatBitSize == 64 && in trySelect()
1212 } else if (SplatValue.isSignedIntN(64)) { in trySelect()
H A DMipsInstructionSelector.cpp161 if (Imm.isSignedIntN(16)) { in materialize32BitImm()
457 if (OffsetValue.isSignedIntN(16)) { in select()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelDAGToDAG.cpp128 if (SplatValue.isSignedIntN(10)) { in INITIALIZE_PASS()
357 if (IsSigned && ImmValue.isSignedIntN(ImmBitSize)) { in selectVSplatImm()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/ADT/
H A DAPSInt.h94 return isSigned() ? isSignedIntN(64) : isIntN(63); in isRepresentableByInt64()
H A DAPInt.h413 bool isSignedIntN(unsigned N) const { return getSignificantBits() <= N; } in isSignedIntN() function
/freebsd-14.2/contrib/llvm-project/lldb/source/Utility/
H A DScalar.cpp659 fits = integer.isSignedIntN(byte_size * 8); in SetValueFromCString()
/freebsd-14.2/contrib/llvm-project/clang/include/clang/Basic/
H A DTargetInfo.h1104 return Value.isSignedIntN(32) && ImmSet.contains(Value.getZExtValue()); in isValidAsmImmediate()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonConstPropagation.cpp2894 if (!constToInt(L.Value, A) || !A.isSignedIntN(64)) in rewriteHexConstDefs()
2914 if (A.isSignedIntN(8)) { in rewriteHexConstDefs()
3016 if (!constToInt(LI.Value, A) || !A.isSignedIntN(8)) in rewriteHexConstUses()
H A DHexagonVectorCombine.cpp2735 if (V.isSignedIntN(8 * sizeof(int))) in calculatePointerDifference()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCLoopInstrFormPrep.cpp1332 if (ConstInt.isSignedIntN(16) && ConstInt.srem(4) != 0) in runOnLoop()
H A DPPCInstrInfo.cpp4473 if (III.SignedImm && !ActualValue.isSignedIntN(III.ImmWidth)) in isImmElgibleForForwarding()
4916 if (!ActualValue.isSignedIntN(III.ImmWidth)) in transformToImmFormFedByLI()
H A DPPCISelLowering.cpp17272 if (!ConstNode->getAPIntValue().isSignedIntN(64)) in decomposeMulByConstant()
18059 if (ConstImm.isSignedIntN(32)) { // Flag to handle 32-bit constants. in computeFlagsForAddressComputation()
18064 if (ConstImm.isSignedIntN(34)) // Flag to handle 34-bit constants. in computeFlagsForAddressComputation()
18078 if (ConstImm.isSignedIntN(16)) { in computeFlagsForAddressComputation()
18083 if (ConstImm.isSignedIntN(34)) in computeFlagsForAddressComputation()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp1831 return !Mask->getValue().isSignedIntN(12) && Mask->getValue().isPowerOf2(); in isMaskAndCmp0FoldingBeneficial()
12548 if (!ImmValMinus1.isSignedIntN(12)) in combineSubOfBoolean()
12812 if ((Imm + 1).isSignedIntN(12)) in performXORCombine()
14660 if (MaskVal.isPowerOf2() && !MaskVal.isSignedIntN(12)) in useInversedSetcc()
15940 !Const->getAPIntValue().sextOrTrunc(EltWidth).isSignedIntN(5))) in PerformDAGCombine()
16209 if (ShrunkMask.isSignedIntN(12)) in targetShrinkDemandedConstant()
16242 else if (!C->isOpaque() && MinSignedBits <= 32 && !ShrunkMask.isSignedIntN(32)) in targetShrinkDemandedConstant()
19729 if (Subtarget.hasStdExtZba() && !Imm.isSignedIntN(12) && in decomposeMulByConstant()
19736 if (!Imm.isSignedIntN(12) && Imm.countr_zero() < 12 && in decomposeMulByConstant()
19764 if (C1.isSignedIntN(12) && !(C1 * C2).isSignedIntN(12)) in isMulAddWithConstProfitable()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelDAGToDAG.cpp669 if (Imm->getAPIntValue().isSignedIntN(8)) in IsProfitableToFold()
694 (-Imm->getAPIntValue()).isSignedIntN(8)) in IsProfitableToFold()
698 (-Imm->getAPIntValue()).isSignedIntN(8) && in IsProfitableToFold()
H A DX86TargetTransformInfo.cpp5639 if ((Idx == 1) && Imm.getBitWidth() <= 64 && Imm.isSignedIntN(32)) in getIntImmCostIntrin()
5643 if ((Idx < 2) || (Imm.getBitWidth() <= 64 && Imm.isSignedIntN(64))) in getIntImmCostIntrin()
5648 if ((Idx < 4) || (Imm.getBitWidth() <= 64 && Imm.isSignedIntN(64))) in getIntImmCostIntrin()
H A DX86ISelLowering.cpp22546 if ((COp0 && !COp0->getAPIntValue().isSignedIntN(8)) || in EmitCmp()
22547 (COp1 && !COp1->getAPIntValue().isSignedIntN(8))) { in EmitCmp()
23682 if (Op1ValPlusOne.isSignedIntN(32) && in LowerSETCC()
23683 (!Op1Val.isSignedIntN(8) || Op1ValPlusOne.isSignedIntN(8))) { in LowerSETCC()
47338 if (Val.isSignedIntN(DstBitsPerElt)) in combineVectorPack()
53830 if (Mask.isSignedIntN(32)) { in combineCMP()
54368 (V.getConstantOperandAPInt(0).isSignedIntN(32) && in pushAddIntoCmovOfConsts()
54369 V.getConstantOperandAPInt(1).isSignedIntN(32)); in pushAddIntoCmovOfConsts()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/
H A DCodeGenPrepare.cpp4143 !isIVIncrement(ScaleReg, &LI) && CI->getValue().isSignedIntN(64)) { in matchScaledValue()
4204 if (Offset.isSignedIntN(64)) { in matchScaledValue()
5003 if (CI->getValue().isSignedIntN(64)) { in matchAddr()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Support/
H A DAPInt.cpp946 if (isSignedIntN(width)) in truncSSat()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp1965 if (!Mask.isSignedIntN(32)) // Avoid large immediates. in EmitTest()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXInstrInfo.td965 return v.isSignedIntN(32);
975 return v.isSignedIntN(16);
H A DNVPTXISelLowering.cpp5407 return Val.isSignedIntN(OptSize); in AreMulWideOperandsDemotable()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstructionCombining.cpp3347 : CaseVal.isSignedIntN(NewWidth); in visitSwitchInst()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/
H A DAArch64AsmParser.cpp4926 if (!IsXReg && !(Simm.isIntN(32) || Simm.isSignedIntN(32))) in parseOperand()

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