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Searched refs:isInstr (Results 1 – 10 of 10) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonMachineScheduler.cpp57 if (SU->isInstr() && QII.mayBeCurLoad(*SU->getInstr())) { in SchedulingCost()
H A DHexagonHazardRecognizer.cpp98 if (UsesLoad && SU->isInstr() && SU->getInstr()->mayLoad()) in ShouldPreferAnother()
H A DHexagonSubtarget.cpp252 if (!SU.isInstr()) in apply()
442 if (!Src->isInstr() || !Dst->isInstr()) in adjustSchedDependency()
H A DHexagonBlockRanges.h59 static bool isInstr(IndexType X) { return X.Index >= First; } in isInstr() function
H A DHexagonFrameLowering.cpp2402 if (!IndexType::isInstr(Range.start()) || in optimizeSpillSlots()
2403 !IndexType::isInstr(Range.end())) in optimizeSpillSlots()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DScheduleDAG.h362 bool isInstr() const { return Instr; } in isInstr() function
590 if (SU->isInstr()) return &SU->getInstr()->getDesc(); in getInstrDesc()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUSubtarget.cpp855 !Def->isInstr() || !Use->isInstr()) in adjustSchedDependency()
H A DSIMachineScheduler.cpp1134 assert(SuccSU->isInstr() && in colorExports()
H A DGCNHazardRecognizer.cpp2728 if (!SU->isInstr()) in ShouldPreferAnother()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachinePipeliner.cpp3105 if (SU.isInstr() && PLI->shouldIgnoreForPipelining(SU.getInstr())) in computeUnpipelineableNodes()
3132 if (!SU.isInstr()) in normalizeNonPipelinedInstructions()