| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.h | 977 bool isInlineConstant(const APInt &Imm) const;
979 bool isInlineConstant(const APFloat &Imm) const { in isInlineConstant() function
980 return isInlineConstant(Imm.bitcastToAPInt()); in isInlineConstant()
992 bool isInlineConstant(const MachineOperand &MO, in isInlineConstant() function
994 return isInlineConstant(MO, OpInfo.OperandType); in isInlineConstant()
999 bool isInlineConstant(const MachineInstr &MI, in isInlineConstant() function
1007 return isInlineConstant(DefMO, MI.getDesc().operands()[OpIdx]); in isInlineConstant()
1017 bool isInlineConstant(const MachineInstr &MI, unsigned OpIdx, in isInlineConstant() function
1028 return isInlineConstant(MO, OpType); in isInlineConstant()
1034 bool isInlineConstant(const MachineOperand &MO) const { in isInlineConstant() function
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| H A D | SIShrinkInstructions.cpp | 163 !TII->isInlineConstant(*Src.getParent(), Src.getOperandNo()); in isKImmOperand()
168 !TII->isInlineConstant(*Src.getParent(), Src.getOperandNo()); in isKUImmOperand()
175 return !TII->isInlineConstant(Src); in isKImmOrKUImmOperand()
180 return !TII->isInlineConstant(Src); in isKImmOrKUImmOperand()
190 if (!isInt<32>(Src.getImm()) || TII->isInlineConstant(Src)) in isReverseInlineImm()
406 if (Src2.isImm() && !TII->isInlineConstant(Src2)) { in shrinkMadFma()
436 if (Src1.isImm() && !TII->isInlineConstant(Src1)) in shrinkMadFma()
438 else if (Src0.isImm() && !TII->isInlineConstant(Src0)) in shrinkMadFma()
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| H A D | SIFoldOperands.cpp | 605 !OpToFold->isReg() && !TII->isInlineConstant(*OpToFold)) { in tryAddToFoldList()
609 TII->isInlineConstant(*MI, MI->getOperand(OpNo), OpImm)) in tryAddToFoldList()
631 if (!OpToFold->isReg() && !TII->isInlineConstant(*OpToFold, OpInfo)) { in tryAddToFoldList()
636 !TII->isInlineConstant(Op, InstDesc.operands()[i])) in tryAddToFoldList()
672 if (TII->isInlineConstant(*Op, OpTy)) in getRegSeqInit()
698 if (OpToFold.isImm() && TII->isInlineConstant(OpToFold, OpTy) && in tryToFoldACImm()
719 if (DefOp.isImm() && TII->isInlineConstant(DefOp, OpTy) && in tryToFoldACImm()
739 if (!TII->isInlineConstant(*Op, OpTy) || in tryToFoldACImm()
847 TII->isInlineConstant(OpToFold, AMDGPU::OPERAND_REG_INLINE_C_INT32)) { in foldOperand()
908 TII->isInlineConstant(*Def, AMDGPU::OPERAND_REG_INLINE_C_INT32)) { in foldOperand()
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| H A D | AMDGPURegBankCombiner.cpp | 266 if ((!MRI.hasOneNonDBGUse(K0->VReg) || TII.isInlineConstant(K0->Value)) && in matchFPMinMaxToMed3()
267 (!MRI.hasOneNonDBGUse(K1->VReg) || TII.isInlineConstant(K1->Value))) { in matchFPMinMaxToMed3()
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| H A D | GCNVOPDUtils.cpp | 90 if (!TII.isInlineConstant(MI, VOPD::Component::SRC0)) in checkVOPDRegConstraints()
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| H A D | SIInstrInfo.cpp | 2137 if (SrcOp.isReg() || isInlineConstant(MI, 1) || in expandPostRAPseudo()
2198 if (Imm.isIntN(32) || isInlineConstant(Imm)) { in expandPostRAPseudo()
3416 if (Is64Bit || !isInlineConstant(Imm)) in FoldImmediate()
3463 if (isInlineConstant(UseMI, *Src0, *ImmOp)) in FoldImmediate()
3499 !isInlineConstant(Def->getOperand(1))) in FoldImmediate()
3557 isInlineConstant(Def->getOperand(1)) && in FoldImmediate()
3572 isInlineConstant(Def->getOperand(1)) && in FoldImmediate()
4255 if (MO.isImm() && isInlineConstant(MO, OpInfo)) { in isImmOperandLegal()
4423 return !isInlineConstant(MO, OpInfo); in usesConstantBus()
5896 if (isInlineConstant(MO, get(Opc).operands()[Idx])) in legalizeOperandsVOP3()
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| H A D | AMDGPUISelDAGToDAG.h | 123 return Subtarget->getInstrInfo()->isInlineConstant(Imm); in isInlineImmediate()
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| H A D | AMDGPUISelDAGToDAG.cpp | 327 return TII->isInlineConstant(C->getAPIntValue()); in isInlineImmediate()
330 return TII->isInlineConstant(C->getValueAPF().bitcastToAPInt()); in isInlineImmediate()
1785 !TII->isInlineConstant(APInt(32, COffsetVal & 0xffffffff)) + in SelectGlobalSAddr()
1786 !TII->isInlineConstant(APInt(32, COffsetVal >> 32)); in SelectGlobalSAddr()
3329 if (TII->isInlineConstant(F32Value)) { in SelectWMMAVISrc()
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| H A D | AMDGPUInstructionSelector.cpp | 2630 if (IsSgpr && TII.isInlineConstant(Imm)) { in selectG_CONSTANT()
4108 if (TII.isInlineConstant(FPValReg->Value.bitcastToAPInt())) { in selectWMMAVISrc()
4120 if (TII.isInlineConstant(ICst)) { in selectWMMAVISrc()
4454 !TII.isInlineConstant(APInt(32, ConstOffset & 0xffffffff)) + in selectGlobalSAddr()
4455 !TII.isInlineConstant(APInt(32, ConstOffset >> 32)); in selectGlobalSAddr()
5761 return TII.isInlineConstant(Imm); in isInlineImmediate()
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| H A D | SIFixSGPRCopies.cpp | 734 TII->isInlineConstant(APInt(64, Copied.getImm(), true))) { in runOnMachineFunction()
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| H A D | GCNHazardRecognizer.cpp | 2852 if (!TII.isInlineConstant(Op, OpInfo)) in fixVALUMaskWriteHazard()
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| H A D | SILoadStoreOptimizer.cpp | 1948 if (TII->isInlineConstant(V)) in createRegOrImm()
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| H A D | SIISelLowering.cpp | 11225 (CRHS->hasOneUse() && !TII->isInlineConstant(CRHS->getAPIntValue()))) { in splitBinaryBitConstantOp()
12862 TII->isInlineConstant(K0->getValueAPF().bitcastToAPInt())) && in performFPMed3ImmCombine()
12864 TII->isInlineConstant(K1->getValueAPF().bitcastToAPInt()))) { in performFPMed3ImmCombine()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 1739 bool isInlineConstant(const MCInst &Inst, unsigned OpIdx) const;
3426 bool AMDGPUAsmParser::isInlineConstant(const MCInst &Inst, in isInlineConstant() function in AMDGPUAsmParser
3529 return !isInlineConstant(Inst, OpIdx); in usesConstantBus()
3949 if (Inst.getOperand(Src2Idx).isImm() && isInlineConstant(Inst, Src2Idx)) { in validateMAISrc2()
4340 if (MO.isImm() && !isInlineConstant(Inst, OpIdx)) { in validateSOPLiteral()
4500 if (MO.isImm() && !isInlineConstant(Inst, OpIdx)) { in validateVOPLiteral()
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