Searched refs:isAllActivePredicate (Results 1 – 4 of 4) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64TargetTransformInfo.cpp | 910 static bool isAllActivePredicate(Value *Pred) { in isAllActivePredicate() function
930 if (isAllActivePredicate(OpPredicate)) in instCombineSVESel()
1339 if (isAllActivePredicate(Pred)) { in instCombineSVELD1()
1358 if (isAllActivePredicate(Pred)) { in instCombineSVEST1()
1861 AbsPred != Pred && !isAllActivePredicate(AbsPred)) in instCombineSVESrshl()
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| H A D | AArch64ISelLowering.h | 959 bool isAllActivePredicate(SelectionDAG &DAG, SDValue N) const;
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| H A D | AArch64ISelDAGToDAG.cpp | 4298 if (!TLI->isAllActivePredicate(*CurDAG, N0.getOperand(0)) || in trySelectXAR()
4299 !TLI->isAllActivePredicate(*CurDAG, N1.getOperand(0))) in trySelectXAR()
7012 return TLI->isAllActivePredicate(*CurDAG, N); in SelectAllActivePredicate()
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| H A D | AArch64ISelLowering.cpp | 12691 static bool isAllActivePredicate(SelectionDAG &DAG, SDValue N) { in isAllActivePredicate() function
12782 if (!isAllActivePredicate(DAG, Shift.getOperand(0))) in tryLowerToSLI()
17756 if (isAllActivePredicate(DAG, N->getOperand(0))) in performSVEAndCombine()
17758 if (isAllActivePredicate(DAG, N->getOperand(1))) in performSVEAndCombine()
19948 if (isAllActivePredicate(DAG, Pg)) { in convertMergedOpToPredOp()
22606 if (isAllActivePredicate(DAG, Pred)) in performSetccMergeZeroCombine()
22775 if (isAllActivePredicate(DAG, N0)) in performVSelectCombine()
26225 if (isAllActivePredicate(DAG, Pg) && OpVT == MVT::nxv16i1) in LowerPredReductionToSVE()
26819 bool AArch64TargetLowering::isAllActivePredicate(SelectionDAG &DAG, in isAllActivePredicate() function in AArch64TargetLowering
26821 return ::isAllActivePredicate(DAG, N); in isAllActivePredicate()
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