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/freebsd-14.2/contrib/libcbor/doc/source/api/
H A Dtype_0_1.rst1 Types 0 & 1 – Positive and negative integers
4 *CBOR* has two types of integers – positive (which may be effectively regarded as unsigned), and ne…
9 Type 0 - positive integers
19 Type 1 - negative integers
37 An integer item is created with one of the four widths. Because integers' `storage is bundled toget…
41 …Due to the fact that CBOR negative integers represent integers in the range :math:`[-1, -2^N]`, ``…
/freebsd-14.2/crypto/heimdal/lib/asn1/
H A Dcheck-gen.c1327 TESTSeqSizeOf1 ssof1f1 = { 1, integers }; in check_seq_of_size()
1328 TESTSeqSizeOf1 ssof1ok1 = { 2, integers }; in check_seq_of_size()
1329 TESTSeqSizeOf1 ssof1f2 = { 3, integers }; in check_seq_of_size()
1337 TESTSeqSizeOf2 ssof2ok1 = { 1, integers }; in check_seq_of_size()
1338 TESTSeqSizeOf2 ssof2ok2 = { 2, integers }; in check_seq_of_size()
1339 TESTSeqSizeOf2 ssof2f2 = { 3, integers }; in check_seq_of_size()
1348 TESTSeqSizeOf3 ssof3ok1 = { 1, integers }; in check_seq_of_size()
1349 TESTSeqSizeOf3 ssof3ok2 = { 2, integers }; in check_seq_of_size()
1357 TESTSeqSizeOf4 ssof4ok2 = { 1, integers }; in check_seq_of_size()
1358 TESTSeqSizeOf4 ssof4ok3 = { 2, integers }; in check_seq_of_size()
[all …]
/freebsd-14.2/sys/contrib/device-tree/Bindings/pinctrl/
H A Dfsl,imx6sx-pinctrl.txt8 - fsl,pins: each entry consists of 6 integers and represents the mux and config
9 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
H A Dfsl,imx6ul-pinctrl.txt9 - fsl,pins: each entry consists of 6 integers and represents the mux and config
10 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
H A Dfsl,imx6sll-pinctrl.txt8 - fsl,pins: each entry consists of 6 integers and represents the mux and config
9 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
H A Dfsl,imx7ulp-pinctrl.txt15 - fsl,pins: Each entry consists of 5 integers which represents the mux
16 and config setting for one pin. The first 4 integers
H A Dfsl,scu-pinctrl.yaml37 each entry consists of 3 integers and represents the pin ID, the mux value
38 and pad setting for the pin. The first 2 integers - pin_id and mux_val - are
H A Dfsl,imx8ulp-pinctrl.yaml34 each entry consists of 5 integers and represents the mux and config
35 setting for one pin. The first 4 integers <mux_config_reg input_reg
H A Dfsl,imx8mm-pinctrl.yaml34 each entry consists of 6 integers and represents the mux and config
35 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
H A Dfsl,imx8mq-pinctrl.yaml34 each entry consists of 6 integers and represents the mux and config
35 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
H A Dfsl,imx93-pinctrl.yaml37 each entry consists of 6 integers and represents the mux and config
38 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
H A Dfsl,imx8mp-pinctrl.yaml34 each entry consists of 6 integers and represents the mux and config
35 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
H A Dfsl,imxrt1170.yaml35 each entry consists of 6 integers and represents the mux and config
36 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
H A Dfsl,imxrt1050.yaml35 each entry consists of 6 integers and represents the mux and config
36 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
H A Dfsl,imx8mn-pinctrl.yaml34 each entry consists of 6 integers and represents the mux and config
35 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
H A Dfsl,imx8m-pinctrl.yaml38 each entry consists of 6 integers and represents the mux and config
39 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
H A Dfsl,imx7d-pinctrl.yaml43 each entry consists of 6 integers and represents the mux and config
44 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
H A Dfsl,imx7d-pinctrl.txt31 - fsl,pins: each entry consists of 6 integers and represents the mux and config
32 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
/freebsd-14.2/lib/libc/softfloat/
H A Dsoftfloat.txt38 precision, and 64-bit integers should be ignored.
85 When 64-bit integers are supported by the compiler, the `softfloat.h' header
90 type is defined as a structure of two 64-bit integers, taking into account
96 When 64-bit integers are _not_ supported by the compiler, the `softfloat.h'
100 `float64' type is defined as a structure of two 32-bit integers, with the
114 integers (32-bit and 64-bit) and any of the floating-point formats.
200 integers. The complete set of conversion functions is:
220 integers to double precision and larger formats are also exact, and likewise
221 for conversions from 64-bit integers to extended double and quadruple
233 languages) require that conversions to integers be rounded toward zero, the
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H A Dsoftfloat-history.txt12 -- Added functions to convert between 64-bit integers (int64) and all
34 and halfway between two integers.
/freebsd-14.2/crypto/openssl/doc/man3/
H A DBN_add_word.pod6 functions on BIGNUMs with integers
25 integers. They are much more efficient than the normal BIGNUM
/freebsd-14.2/sys/contrib/device-tree/Bindings/leds/
H A Dleds-netxbig.txt9 - timers: Timer array. Each timer entry is represented by three integers:
16 - mode-val: Mode to value mapping. Each entry is represented by two integers:
/freebsd-14.2/sys/contrib/device-tree/Bindings/input/touchscreen/
H A Dts4800-ts.txt7 - syscon: phandle / integers array that points to the syscon node which
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/IR/
H A DInstruction.def184 HANDLE_CAST_INST(38, Trunc , TruncInst ) // Truncate integers
185 HANDLE_CAST_INST(39, ZExt , ZExtInst ) // Zero extend integers
186 HANDLE_CAST_INST(40, SExt , SExtInst ) // Sign extend integers
/freebsd-14.2/sys/contrib/device-tree/Bindings/regulator/
H A Dmp886x.txt9 - mps,fb-voltage-divider: An array of two integers containing the resistor

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