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Searched refs:imm2 (Results 1 – 22 of 22) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchLASXInstrFormats.td89 bits<2> imm2;
94 let Inst{11-10} = imm2;
103 bits<2> imm2;
108 let Inst{11-10} = imm2;
117 bits<2> imm2;
122 let Inst{11-10} = imm2;
278 bits<2> imm2;
284 let Inst{19-18} = imm2;
H A DLoongArchLSXInstrFormats.td117 bits<2> imm2;
122 let Inst{11-10} = imm2;
131 bits<2> imm2;
136 let Inst{11-10} = imm2;
145 bits<2> imm2;
150 let Inst{11-10} = imm2;
323 bits<2> imm2;
329 let Inst{19-18} = imm2;
H A DLoongArchInstrFormats.td82 bits<2> imm2;
88 let Inst{16-15} = imm2;
H A DLoongArchLASXInstrInfo.td65 : Fmt2RI2_XXI<op, (outs LASX256:$xd), (ins LASX256:$xj, ImmOpnd:$imm2),
66 "$xd, $xj, $imm2">;
69 : Fmt2RI2_RXI<op, (outs GPR:$rd), (ins LASX256:$xj, ImmOpnd:$imm2),
70 "$rd, $xj, $imm2">;
107 (ins LASX256:$xd, GPR:$rj, ImmOpnd:$imm8, IdxOpnd:$imm2),
108 "$xd, $rj, $imm8, $imm2">;
141 : Fmt2RI2_XXI<op, (outs LASX256:$dst), (ins LASX256:$xd, LASX256:$xj, ImmOpnd:$imm2),
142 "$xd, $xj, $imm2">;
148 : Fmt2RI2_XRI<op, (outs LASX256:$dst), (ins LASX256:$xd, GPR:$rj, ImmOpnd:$imm2),
149 "$xd, $rj, $imm2">;
H A DLoongArchInstrInfo.td619 : Fmt3RI2<op, (outs GPR:$rd), (ins GPR:$rj, GPR:$rk, ImmOpnd:$imm2),
620 "$rd, $rj, $rk, $imm2">;
1311 def : Pat<(add GPR:$rk, (shl GPR:$rj, uimm2_plus1:$imm2)),
1312 (ALSL_W GPR:$rj, GPR:$rk, uimm2_plus1:$imm2)>;
1315 def : Pat<(add GPR:$rk, (shl GPR:$rj, uimm2_plus1:$imm2)),
1316 (ALSL_D GPR:$rj, GPR:$rk, uimm2_plus1:$imm2)>;
1317 def : Pat<(sext_inreg (add GPR:$rk, (shl GPR:$rj, uimm2_plus1:$imm2)), i32),
1318 (ALSL_W GPR:$rj, GPR:$rk, uimm2_plus1:$imm2)>;
1319 def : Pat<(loongarch_bstrpick (add GPR:$rk, (shl GPR:$rj, uimm2_plus1:$imm2)),
1321 (ALSL_WU GPR:$rj, GPR:$rk, uimm2_plus1:$imm2)>;
H A DLoongArchLSXInstrInfo.td205 : Fmt2RI2_VVI<op, (outs LSX128:$vd), (ins LSX128:$vj, ImmOpnd:$imm2),
206 "$vd, $vj, $imm2">;
209 : Fmt2RI2_RVI<op, (outs GPR:$rd), (ins LSX128:$vj, ImmOpnd:$imm2),
210 "$rd, $vj, $imm2">;
248 (ins LSX128:$vd, GPR:$rj, ImmOpnd:$imm8, IdxOpnd:$imm2),
249 "$vd, $rj, $imm8, $imm2">;
280 : Fmt2RI2_VRI<op, (outs LSX128:$dst), (ins LSX128:$vd, GPR:$rj, ImmOpnd:$imm2),
281 "$vd, $rj, $imm2">;
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaInstrInfo.td139 def EXTUI : RRR_Inst<0x00, 0x04, 0x00, (outs AR:$r), (ins AR:$t, uimm5:$imm1, imm1_16:$imm2),
140 "extui\t$r, $t, $imm1, $imm2", []> {
142 bits<4> imm2;
146 let Inst{23-20} = imm2;
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYInstrFormats.td145 (ins GPR:$rx, operand:$imm2),
146 !strconcat(op, "\t$rx, $imm2"), pattern> {
148 bits<2> imm2;
152 let Inst{1 - 0} = imm2;
H A DCSKYInstrInfo.td1072 def TRAP32 : CSKY32Inst<AddrModeNone, 0x30, (outs), (ins uimm2:$imm2), "trap32 ${imm2}", []> {
1073 bits<2> imm2;
1078 let Inst{11 - 10} = imm2;
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DSMEInstrFormats.td2062 def : InstAlias<mnemonic # "\t$ZAda[$Rv, $imm2], $Zn, $Zm",
2107 def : InstAlias<mnemonic # "\t$ZAda[$Rv, $imm2], $Zn, $Zm",
2659 bits<2> imm2;
2670 let Inst{1-0} = imm2;
2680 def : InstAlias<mnemonic # "\t$ZAda[$Rv, $imm2], $Zn, $Zm$i",
2728 mnemonic, "\t$ZAda[$Rv, $imm2], $Zn, $Zm$i",
2734 bits<2> imm2;
2744 let Inst{1-0} = imm2;
2762 mnemonic, "\t$ZAda[$Rv, $imm2], $Zn, $Zm$i",
2768 bits<2> imm2;
[all …]
H A DSVEInstrFormats.td9330 bits<2> imm2;
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMips32r6InstrFormats.td508 bits<2> imm2;
517 let Inst{7-6} = imm2;
H A DMicroMips32r6InstrFormats.td362 bits<2> imm2;
370 let Inst{10-9} = imm2;
H A DMips32r6InstrInfo.td750 dag InOperandList = (ins GPROpnd:$rs, GPROpnd:$rt, ImmOpnd:$imm2);
751 string AsmString = !strconcat(instr_asm, "\t$rd, $rs, $rt, $imm2");
H A DMicroMips32r6InstrInfo.td555 dag InOperandList = (ins GPROpnd:$rs, GPROpnd:$rt, ImmOpnd:$imm2);
556 string AsmString = !strconcat(instr_asm, "\t$rt, $rs, $rd, $imm2");
H A DMipsFastISel.cpp232 unsigned Op0, uint64_t imm1, uint64_t imm2, in fastEmitInst_riir() argument
/freebsd-14.2/sys/i386/i386/
H A Ddb_disasm.c1162 int imm2; in db_disasm() local
1494 get_value_inc(imm2, loc, 2, FALSE); /* segment */ in db_disasm()
1495 db_printf("$%#r,%#r", imm2, imm); in db_disasm()
/freebsd-14.2/sys/amd64/amd64/
H A Ddb_disasm.c1247 int imm2; in db_disasm() local
1735 get_value_inc(imm2, loc, 2, FALSE); /* segment */ in db_disasm()
1736 db_printf("$%#r,%#r", imm2, imm); in db_disasm()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/AsmParser/
H A DHexagonAsmParser.cpp1580 MCOperand imm2(MCOperand::createExpr(Expr)); // lower 32 in processInstruction() local
1581 Inst = makeCombineInst(Hexagon::A4_combineii, Rdd, imm, imm2); in processInstruction()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstrThumb2.td343 // t2addrmode_so_reg := reg + (reg << imm2)
763 let Inst{7-6} = 0b00; // imm2
849 let Inst{7-6} = 0b00; // imm2
1006 let Inst{7-6} = 0b00; // imm2
1048 let Inst{7-6} = 0b00; // imm2
1166 let Inst{7-6} = 0b00; // imm2
1969 let Inst{5-4} = addr{1-0}; // imm2
2989 let Inst{7-6} = 0b00; // imm2
3506 let Inst{7-6} = 0b00; // imm2
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZInstrFormats.td3333 ImmOpWithPattern imm1, ImmOpWithPattern imm2>
3334 : InstIE<opcode, (outs), (ins imm1:$I1, imm2:$I2),
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXIntrinsics.td1562 def imm2 : NVPTXInst<(outs regclass:$dst),