Searched refs:hasSSE1 (Results 1 – 10 of 10) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86Subtarget.h | 199 bool canUseCMOV() const { return hasCMOV() || hasSSE1() || is64Bit(); } in canUseCMOV() 200 bool hasSSE1() const { return X86SSELevel >= SSE1; } in hasSSE1() function 225 return hasSSE1() || (hasPRFCHW() && !hasThreeDNow()) || hasPREFETCHWT1() || in hasSSEPrefetch()
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| H A D | X86InstrPredicates.td | 54 def HasSSE1 : Predicate<"Subtarget->hasSSE1()">; 55 def UseSSE1 : Predicate<"Subtarget->hasSSE1() && !Subtarget->hasAVX()">; 157 def FPStackf32 : Predicate<"!Subtarget->hasSSE1()">;
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| H A D | X86CallingConv.td | 141 CCIfSubtarget<"hasSSE1()", CCAssignToReg<RC.XMM>>>, 149 CCIfSubtarget<"hasSSE1()", CCAssignToReg<RC.XMM>>>, 222 CCIfSubtarget<"hasSSE1()", CCAssignToReg<RC.XMM>>>, 226 CCIfSubtarget<"hasSSE1()", CCAssignToReg<RC.XMM>>>, 396 CCIfType<[f32], CCIfNotSubtarget<"hasSSE1()", CCBitConvertToType<i32>>>, 397 CCIfType<[f64], CCIfNotSubtarget<"hasSSE1()", CCBitConvertToType<i64>>>, 593 CCIfSubtarget<"hasSSE1()", 674 CCIfType<[f32], CCIfNotSubtarget<"hasSSE1()", CCBitConvertToType<i32>>>, 675 CCIfType<[f64], CCIfNotSubtarget<"hasSSE1()", CCBitConvertToType<i64>>>, 722 CCIfSubtarget<"hasSSE1()",
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| H A D | X86FastISel.cpp | 301 if (VT == MVT::f32 && !Subtarget->hasSSE1()) in isTypeLegal() 319 bool HasSSE1 = Subtarget->hasSSE1(); in X86FastEmitLoad() 481 bool HasSSE1 = Subtarget->hasSSE1(); in X86FastEmitStore() 1360 bool HasSSE1 = Subtarget->hasSSE1(); in X86ChooseCmpOpcode() 2788 if (!Subtarget->hasSSE1()) in fastLowerIntrinsicCall() 2969 if (!Subtarget->hasSSE1()) in fastLowerIntrinsicCall() 3135 if (!Subtarget->hasSSE1()) in fastLowerArguments() 3495 assert((Subtarget->hasSSE1() || !NumXMMRegs) in fastLowerCall() 3784 bool HasSSE1 = Subtarget->hasSSE1(); in X86MaterializeFP() 3904 if (!Subtarget->hasSSE1()) in fastMaterializeConstant() [all …]
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| H A D | X86ISelLoweringCall.cpp | 272 if (Subtarget.hasSSE1()) in getByValTypeAlignment() 305 if (Subtarget.hasSSE1() && (Subtarget.is64Bit() || Subtarget.hasX87()) && in getOptimalMemOpType() 329 return Subtarget.hasSSE1(); in isSafeMemOpType() 789 if (!Subtarget.hasSSE1() && X86::FR32XRegClass.contains(VA.getLocReg())) { in LowerReturn() 1121 if (!Subtarget.hasSSE1() && X86::FR32XRegClass.contains(VA.getLocReg())) { in LowerCallResult() 1441 if (isSoftFloat || !Subtarget.hasSSE1()) in get64BitArgumentXMMs() 1523 assert(!(NumXMMRegs && !Subtarget.hasSSE1()) && in createVarArgAreaAndStoreRegisters() 2273 (Subtarget.hasSSE1() || !M->getModuleFlag("SkipRaxSetup"))) { in LowerCall() 2288 assert((Subtarget.hasSSE1() || !NumXMMRegs) in LowerCall()
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| H A D | X86RegisterInfo.cpp | 287 bool HasSSE = Subtarget.hasSSE1(); in getCalleeSavedRegs() 422 bool HasSSE = Subtarget.hasSSE1(); in getCallPreservedMask() 694 if (ST.hasSSE1() && in isArgumentRegister()
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| H A D | X86TargetTransformInfo.cpp | 165 if (Vector && !ST->hasSSE1()) in getNumberOfRegisters() 187 if (ST->hasSSE1() && PreferVectorWidth >= 128) in getRegisterBitWidth() 1386 if (ST->hasSSE1()) in getArithmeticInstrCost() 2092 if (ST->hasSSE1()) in getShuffleCost() 3349 if (ST->hasSSE1()) in getCmpSelInstrCost() 4280 if (ST->hasSSE1()) in getIntrinsicInstrCost() 5897 return DataSize == 16 ? ST->hasSSE1() : ST->hasAVX2(); in isLegalNTLoad() 5922 return ST->hasSSE1(); in isLegalNTStore()
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| H A D | X86ISelLowering.cpp | 22661 if ((VT == MVT::f32 && Subtarget.hasSSE1()) || in getSqrtEstimate() 24904 Subtarget.hasSSE1()); in LowerVAARG() 27545 if (Subtarget.hasSSE1()) { in LowerSET_ROUNDING() 27609 if (Subtarget.hasSSE1()) { in LowerGET_FPENV_MEM() 27634 if (Subtarget.hasSSE1()) { in createSetFPEnvNodes() 31318 if (Subtarget.hasSSE1()) { in LowerATOMIC_STORE() 32916 if (Subtarget.hasSSE1()) { in ReplaceNodeResults() 42758 if (Subtarget.hasSSE1()) { in createMMXBuildVector() 56883 if (Subtarget.hasSSE1()) in LowerXConstraint() 57210 if (!Subtarget.hasSSE1()) break; in getRegForInlineAsmConstraint() [all …]
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| H A D | X86InstrInfo.cpp | 10551 if (!ST.hasSSE1()) in buildClearRegister()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86LegalizerInfo.cpp | 33 bool HasSSE1 = Subtarget.hasSSE1(); in X86LegalizerInfo()
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