Searched refs:hasImplicitDefOfPhysReg (Results 1 – 12 of 12) sorted by relevance
32 bool MCInstrDesc::hasImplicitDefOfPhysReg(unsigned Reg, in hasImplicitDefOfPhysReg() function in MCInstrDesc51 return hasImplicitDefOfPhysReg(Reg, &RI); in hasDefOfPhysReg()
593 bool hasImplicitDefOfPhysReg(unsigned Reg,
712 (Desc.hasImplicitDefOfPhysReg(AMDGPU::VCC) || in needsImpliedVcc()713 Desc.hasImplicitDefOfPhysReg(AMDGPU::VCC_LO)); in needsImpliedVcc()729 (Desc.hasImplicitDefOfPhysReg(AMDGPU::VCC) || in printOperand()730 Desc.hasImplicitDefOfPhysReg(AMDGPU::VCC_LO))) in printOperand()
321 Desc.hasImplicitDefOfPhysReg(AMDGPU::EXEC); in isVCMPX64()
146 !TII->get(DstOpcode).hasImplicitDefOfPhysReg(MO.getReg())) in isLegal()
10479 MI.getDesc().hasImplicitDefOfPhysReg(X86::RSP)) in getOutliningTypeImpl()10485 MI.getDesc().hasImplicitDefOfPhysReg(X86::RIP)) in getOutliningTypeImpl()
131 if (ResNo >= II.getNumDefs() && II.hasImplicitDefOfPhysReg(Reg)) in CheckForPhysRegDependency()
250 !DefMIDesc.hasImplicitDefOfPhysReg(Reg)); in addPhysRegDataDeps()
1212 get(MemOpcode).hasImplicitDefOfPhysReg(SystemZ::CC))) in foldMemoryOperandImpl()
4725 if (MCID.isCall() || (MCID.hasImplicitDefOfPhysReg(ARM::CPSR) && in getPredicationCost()4755 if (PredCost && (MCID.isCall() || (MCID.hasImplicitDefOfPhysReg(ARM::CPSR) && in getInstrLatency()
2487 MI.getDesc().hasImplicitDefOfPhysReg(RISCV::X5)) in getOutliningTypeImpl()
16046 if (II.isCompare() && II.hasImplicitDefOfPhysReg(AMDGPU::SCC)) { in checkForPhysRegDependency()