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Searched refs:hasFeature (Results 1 – 25 of 134) sorted by relevance

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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMTargetStreamer.cpp135 if (STI.hasFeature(ARM::HasV9_0aOps)) in getArchForCPU()
146 if (STI.hasFeature(ARM::FeatureMClass) && STI.hasFeature(ARM::FeatureDSP)) in getArchForCPU()
153 else if (STI.hasFeature(ARM::HasV6MOps)) in getArchForCPU()
155 else if (STI.hasFeature(ARM::HasV6Ops)) in getArchForCPU()
182 if (STI.hasFeature(ARM::ProcKrait)) { in emitTargetAttributes()
221 if (STI.hasFeature(ARM::FeatureNEON)) { in emitTargetAttributes()
235 if (STI.hasFeature(ARM::HasV8Ops)) in emitTargetAttributes()
275 if (STI.hasFeature(ARM::FeatureVFP2_SP) && !STI.hasFeature(ARM::FeatureFP64)) in emitTargetAttributes()
279 if (STI.hasFeature(ARM::FeatureFP16)) in emitTargetAttributes()
282 if (STI.hasFeature(ARM::FeatureMP)) in emitTargetAttributes()
[all …]
H A DARMAsmBackend.cpp225 bool HasThumb2 = STI.hasFeature(ARM::FeatureThumb2); in getRelaxedOpcode()
226 bool HasV8MBaselineOps = STI.hasFeature(ARM::HasV8MBaselineOps); in getRelaxedOpcode()
634 (!STI->hasFeature(ARM::FeatureThumb2) && in adjustFixupValue()
635 !STI->hasFeature(ARM::HasV8MBaselineOps) && in adjustFixupValue()
636 !STI->hasFeature(ARM::HasV6MOps) && in adjustFixupValue()
711 if (!STI->hasFeature(ARM::FeatureThumb2) && IsResolved) { in adjustFixupValue()
736 if (!STI->hasFeature(ARM::FeatureThumb2) && in adjustFixupValue()
737 !STI->hasFeature(ARM::HasV8MBaselineOps)) { in adjustFixupValue()
748 if (!STI->hasFeature(ARM::FeatureThumb2)) { in adjustFixupValue()
H A DARMMCTargetDesc.cpp40 if (STI.hasFeature(llvm::ARM::HasV7Ops) && in getMCRDeprecationInfo()
67 if (STI.hasFeature(llvm::ARM::HasV7Ops) && in getMCRDeprecationInfo()
79 if (STI.hasFeature(llvm::ARM::HasV7Ops) && in getMRCDeprecationInfo()
91 assert(!STI.hasFeature(llvm::ARM::ModeThumb) && in getARMStoreDeprecationInfo()
107 assert(!STI.hasFeature(llvm::ARM::ModeThumb) && in getARMLoadDeprecationInfo()
600 Addr += STI->hasFeature(ARM::ModeThumb) ? 4 : 8; in evaluateMemoryOperandAddress()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/CSKY/MCTargetDesc/
H A DCSKYELFStreamer.cpp196 if (STI.hasFeature(CSKY::HasE1)) in emitTargetAttributes()
199 if (STI.hasFeature(CSKY::HasE2)) in emitTargetAttributes()
202 if (STI.hasFeature(CSKY::Has2E3)) in emitTargetAttributes()
205 if (STI.hasFeature(CSKY::HasMP)) in emitTargetAttributes()
208 if (STI.hasFeature(CSKY::Has3E3r1)) in emitTargetAttributes()
217 if (STI.hasFeature(CSKY::Has3E7)) in emitTargetAttributes()
220 if (STI.hasFeature(CSKY::HasMP1E2)) in emitTargetAttributes()
223 if (STI.hasFeature(CSKY::Has7E10)) in emitTargetAttributes()
226 if (STI.hasFeature(CSKY::Has10E60)) in emitTargetAttributes()
244 if (STI.hasFeature(CSKY::HasDSP1E2)) in emitTargetAttributes()
[all …]
/freebsd-14.2/contrib/llvm-project/compiler-rt/lib/builtins/cpu_model/
H A Dx86.c715 #define hasFeature(F) ((Features[F / 32] >> (F % 32)) & 1) in getAvailableFeatures() macro
847 if (hasFeature(FEATURE_LM) && hasFeature(FEATURE_SSE2)) { in getAvailableFeatures()
849 if (hasFeature(FEATURE_CMPXCHG16B) && hasFeature(FEATURE_POPCNT) && in getAvailableFeatures()
850 hasFeature(FEATURE_LAHF_LM) && hasFeature(FEATURE_SSE4_2)) { in getAvailableFeatures()
852 if (hasFeature(FEATURE_AVX2) && hasFeature(FEATURE_BMI) && in getAvailableFeatures()
853 hasFeature(FEATURE_BMI2) && hasFeature(FEATURE_F16C) && in getAvailableFeatures()
854 hasFeature(FEATURE_FMA) && hasFeature(FEATURE_LZCNT) && in getAvailableFeatures()
855 hasFeature(FEATURE_MOVBE)) { in getAvailableFeatures()
857 if (hasFeature(FEATURE_AVX512BW) && hasFeature(FEATURE_AVX512CD) && in getAvailableFeatures()
858 hasFeature(FEATURE_AVX512DQ) && hasFeature(FEATURE_AVX512VL)) in getAvailableFeatures()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVMatInt.cpp50 bool IsRV64 = STI.hasFeature(RISCV::Feature64Bit); in generateInstSeqImpl()
53 if (STI.hasFeature(RISCV::FeatureStdExtZbs) && isPowerOf2_64(Val) && in generateInstSeqImpl()
124 STI.hasFeature(RISCV::FeatureStdExtZba)) { in generateInstSeqImpl()
135 STI.hasFeature(RISCV::FeatureStdExtZba)) { in generateInstSeqImpl()
255 assert(STI.hasFeature(RISCV::Feature64Bit) && in generateInstSeq()
299 if (Res.size() > 2 && STI.hasFeature(RISCV::FeatureStdExtZbkb)) { in generateInstSeq()
313 if (Res.size() > 2 && STI.hasFeature(RISCV::FeatureStdExtZbs)) { in generateInstSeq()
366 if (Res.size() > 2 && STI.hasFeature(RISCV::FeatureStdExtZba)) { in generateInstSeq()
422 if (Res.size() > 2 && (STI.hasFeature(RISCV::FeatureStdExtZbb) || in generateInstSeq()
429 TmpSeq.emplace_back(STI.hasFeature(RISCV::FeatureStdExtZbb) in generateInstSeq()
[all …]
H A DRISCVMCObjectFileInfo.cpp22 bool RVC = STI.hasFeature(RISCV::FeatureStdExtC) || in getTextSectionAlignment()
23 STI.hasFeature(RISCV::FeatureStdExtZca); in getTextSectionAlignment()
H A DRISCVTargetStreamer.cpp52 HasRVC = STI.hasFeature(RISCV::FeatureStdExtC); in setFlagsFromFeatures()
53 HasTSO = STI.hasFeature(RISCV::FeatureStdExtZtso); in setFlagsFromFeatures()
68 STI.hasFeature(RISCV::Feature64Bit), STI.getFeatureBits()); in emitTargetAttributes()
H A DRISCVAsmBackend.cpp139 return STI->hasFeature(RISCV::FeatureRelax) || ForceRelocs; in shouldForceRelocation()
398 bool UseCompressedNop = STI->hasFeature(RISCV::FeatureStdExtC) || in writeNopData()
399 STI->hasFeature(RISCV::FeatureStdExtZca); in writeNopData()
672 if (!STI->hasFeature(RISCV::FeatureRelax)) in shouldInsertExtraNopBytesForCodeAlign()
675 bool UseCompressedNop = STI->hasFeature(RISCV::FeatureStdExtC) || in shouldInsertExtraNopBytesForCodeAlign()
676 STI->hasFeature(RISCV::FeatureStdExtZca); in shouldInsertExtraNopBytesForCodeAlign()
697 if (!STI->hasFeature(RISCV::FeatureRelax)) in shouldInsertFixupForCodeAlign()
H A DRISCVInstPrinter.cpp112 if (!STI.hasFeature(RISCV::Feature64Bit)) in printBranchOperand()
299 bool IsRV64 = STI.hasFeature(RISCV::Feature64Bit); in printSpimm()
300 bool IsEABI = STI.hasFeature(RISCV::FeatureRVE); in printSpimm()
H A DRISCVMCCodeEmitter.cpp205 if (STI.hasFeature(RISCV::FeatureRelax)) { in expandAddTPRel()
253 if (IsEqTest && (STI.hasFeature(RISCV::FeatureStdExtC) || in expandLongCondBr()
254 STI.hasFeature(RISCV::FeatureStdExtZca))) { in expandLongCondBr()
387 bool EnableRelax = STI.hasFeature(RISCV::FeatureRelax); in getImmOpValue()
/freebsd-14.2/contrib/llvm-project/clang/lib/Basic/Targets/
H A DHexagon.cpp83 if (hasFeature("hvx-length64b")) { in getTargetDefines()
89 if (hasFeature("hvx-length128b")) { in getTargetDefines()
97 if (hasFeature("audio")) { in getTargetDefines()
211 bool HexagonTargetInfo::hasFeature(StringRef Feature) const { in hasFeature() function in HexagonTargetInfo
H A DX86.h335 bool hasFeature(StringRef Feature) const final;
499 if (hasFeature("cx8")) in setMaxAtomicWidth()
566 hasFeature("avx512f") ? 512 : hasFeature("avx") ? 256 : 128; in handleTargetFeatures()
810 if (hasFeature("cx16")) in setMaxAtomicWidth()
946 hasFeature("avx512f") ? 512 : hasFeature("avx") ? 256 : 128; in handleTargetFeatures()
H A DLanai.cpp53 bool LanaiTargetInfo::hasFeature(StringRef Feature) const { in hasFeature() function in LanaiTargetInfo
H A DDirectX.h72 bool hasFeature(StringRef Feature) const override { in hasFeature() function
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUMCAsmInfo.cpp60 if (STI->hasFeature(AMDGPU::FeatureNSAEncoding)) in getMaxInstLength()
64 if (STI->hasFeature(AMDGPU::FeatureVOP3Literal)) in getMaxInstLength()
H A DR600MCCodeEmitter.cpp100 if (!(STI.hasFeature(R600::FeatureCaymanISA))) { in encodeInstruction()
133 if ((STI.hasFeature(R600::FeatureR600ALUInst)) && in encodeInstruction()
H A DAMDGPUMCCodeEmitter.cpp154 STI.hasFeature(AMDGPU::FeatureInv2PiInlineImm)) in getLit16Encoding()
190 STI.hasFeature(AMDGPU::FeatureInv2PiInlineImm)) in getLit32Encoding()
226 STI.hasFeature(AMDGPU::FeatureInv2PiInlineImm)) in getLit64Encoding()
376 if ((bytes > 8 && STI.hasFeature(AMDGPU::FeatureVOP3Literal)) || in encodeInstruction()
377 (bytes > 4 && !STI.hasFeature(AMDGPU::FeatureVOP3Literal))) in encodeInstruction()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp650 if (STI.hasFeature(AMDGPU::FeatureGFX90AInsts)) { in getInstruction()
676 if (STI.hasFeature(AMDGPU::FeatureGFX940Insts)) { in getInstruction()
682 if (STI.hasFeature(AMDGPU::FeatureGFX90AInsts)) { in getInstruction()
845 if (STI.hasFeature(AMDGPU::FeatureGFX11Insts)) { in convertEXPInst()
871 if (STI.hasFeature(AMDGPU::FeatureGFX9) || in convertSDWAInst()
872 STI.hasFeature(AMDGPU::FeatureGFX10)) { in convertSDWAInst()
1732 if (STI.hasFeature(AMDGPU::FeatureGFX9) || in decodeSDWASrc()
1733 STI.hasFeature(AMDGPU::FeatureGFX10)) { in decodeSDWASrc()
1779 assert((STI.hasFeature(AMDGPU::FeatureGFX9) || in decodeSDWAVopcDst()
1780 STI.hasFeature(AMDGPU::FeatureGFX10)) && in decodeSDWAVopcDst()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86AsmBackend.cpp295 assert((STI.hasFeature(X86::Is32Bit) || STI.hasFeature(X86::Is64Bit)) && in determinePaddingPrefix()
336 if (STI.hasFeature(X86::Is64Bit)) in determinePaddingPrefix()
495 if (!(STI.hasFeature(X86::Is64Bit) || STI.hasFeature(X86::Is32Bit))) in canPadBranches()
744 bool Is16BitMode = STI.hasFeature(X86::Is16Bit); in relaxInstruction()
976 if (STI.hasFeature(X86::Is16Bit)) in getMaximumNopSize()
978 if (!STI.hasFeature(X86::FeatureNOPL) && !STI.hasFeature(X86::Is64Bit)) in getMaximumNopSize()
980 if (STI.hasFeature(X86::TuningFast7ByteNOP)) in getMaximumNopSize()
982 if (STI.hasFeature(X86::TuningFast15ByteNOP)) in getMaximumNopSize()
984 if (STI.hasFeature(X86::TuningFast11ByteNOP)) in getMaximumNopSize()
1033 STI->hasFeature(X86::Is16Bit) ? Nops16Bit : Nops32Bit; in writeNopData()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/
H A DAMDGPUBaseInfo.cpp474 if (ST.hasFeature(AMDGPU::FeatureGFX12Insts)) in getVOPDEncodingFamily()
476 if (ST.hasFeature(AMDGPU::FeatureGFX11Insts)) in getVOPDEncodingFamily()
2089 return STI.hasFeature(AMDGPU::FeatureXNACK); in hasXNACK()
2097 return STI.hasFeature(AMDGPU::FeatureMIMG_R128) && !STI.hasFeature(AMDGPU::FeatureR128A16); in hasMIMG_R128()
2101 return STI.hasFeature(AMDGPU::FeatureA16); in hasA16()
2105 return STI.hasFeature(AMDGPU::FeatureG16); in hasG16()
2114 return STI.hasFeature(AMDGPU::FeatureGDS); in hasGDS()
2143 return STI.hasFeature(AMDGPU::FeatureGFX9); in isGFX9()
2167 return STI.hasFeature(AMDGPU::FeatureGFX10); in isGFX10()
2179 return STI.hasFeature(AMDGPU::FeatureGFX11); in isGFX11()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/Disassembler/
H A DRISCVDisassembler.cpp67 bool IsRVE = Decoder->getSubtargetInfo().hasFeature(RISCV::FeatureRVE); in DecodeGPRRegisterClass()
533 TRY_TO_DECODE(STI.hasFeature(FEATURE), DECODER_TABLE, DESC) in getInstruction()
545 TRY_TO_DECODE(STI.hasFeature(RISCV::FeatureStdExtZdinx) && in getInstruction()
546 !STI.hasFeature(RISCV::Feature64Bit), in getInstruction()
549 TRY_TO_DECODE(STI.hasFeature(RISCV::FeatureStdExtZacas) && in getInstruction()
550 !STI.hasFeature(RISCV::Feature64Bit), in getInstruction()
625 TRY_TO_DECODE_AND_ADD_SP(!STI.hasFeature(RISCV::Feature64Bit), in getInstruction()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPURemoveIncompatibleFunctions.cpp168 if (ST->hasFeature(Feature) && !GPUFeatureBits.test(Feature)) { in checkFunction()
179 ST->hasFeature(AMDGPU::FeatureWavefrontSize32)) { in checkFunction()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/LoongArch/MCTargetDesc/
H A DLoongArchAsmBackend.cpp189 if (!AF.getSubtargetInfo()->hasFeature(LoongArch::FeatureRelax)) in shouldInsertExtraNopBytesForCodeAlign()
212 if (!AF.getSubtargetInfo()->hasFeature(LoongArch::FeatureRelax)) in shouldInsertFixupForCodeAlign()
254 return STI->hasFeature(LoongArch::FeatureRelax); in shouldForceRelocation()
473 if (!STI.hasFeature(LoongArch::FeatureRelax)) in handleAddSubRelocations()
510 OSABI, Is64Bit, STI.hasFeature(LoongArch::FeatureRelax)); in createObjectTargetWriter()
/freebsd-14.2/contrib/llvm-project/clang/lib/CodeGen/Targets/
H A DHexagon.cpp146 if (T.hasFeature("hvx")) { in classifyReturnType()
147 assert(T.hasFeature("hvx-length64b") || T.hasFeature("hvx-length128b")); in classifyReturnType()
148 uint64_t VecSize = T.hasFeature("hvx-length64b") ? 64*8 : 128*8; in classifyReturnType()

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