| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kRegisterInfo.cpp | 151 if (hasBasePointer(MF)) { in getReservedRegs() 184 if (hasBasePointer(MF)) in eliminateFrameIndex() 228 bool M68kRegisterInfo::hasBasePointer(const MachineFunction &MF) const { in hasBasePointer() function in M68kRegisterInfo
|
| H A D | M68kRegisterInfo.h | 94 bool hasBasePointer(const MachineFunction &MF) const;
|
| H A D | M68kFrameLowering.cpp | 62 TRI->hasBasePointer(MF); in canSimplifyCallFramePseudos() 83 if (TRI->hasBasePointer(MF)) in getFrameIndexReference() 100 if (TRI->hasBasePointer(MF)) { in getFrameIndexReference() 626 if (TRI->hasBasePointer(MF)) { in emitPrologue() 799 if (TRI->hasBasePointer(MF)) { in determineCalleeSaves()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiRegisterInfo.cpp | 59 if (hasBasePointer(MF)) in getReservedRegs() 155 if (hasBasePointer(MF)) in eliminateFrameIndex() 246 bool LanaiRegisterInfo::hasBasePointer(const MachineFunction &MF) const { in hasBasePointer() function in LanaiRegisterInfo
|
| H A D | LanaiRegisterInfo.h | 45 bool hasBasePointer(const MachineFunction &MF) const;
|
| H A D | LanaiFrameLowering.cpp | 212 if (LRI->hasBasePointer(MF)) { in determineCalleeSaves()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86RegisterInfo.h | 135 bool hasBasePointer(const MachineFunction &MF) const;
|
| H A D | X86ArgumentStackSlotRebase.cpp | 119 if (!TRI->hasBasePointer(MF)) in runOnMachineFunction()
|
| H A D | X86RegisterInfo.cpp | 563 if (hasBasePointer(MF)) { in getReservedRegs() 749 bool X86RegisterInfo::hasBasePointer(const MachineFunction &MF) const { in hasBasePointer() function in X86RegisterInfo
|
| H A D | X86FrameLowering.cpp | 77 TRI->hasBasePointer(MF); in canSimplifyCallFramePseudos() 2130 if (TRI->hasBasePointer(MF)) { in emitPrologue() 2553 if (TRI->hasBasePointer(MF)) in getFrameIndexReference() 2622 if (TRI->hasStackRealignment(MF) || TRI->hasBasePointer(MF)) in getFrameIndexReference() 2763 if (this->TRI->hasBasePointer(MF)) { in assignCalleeSavedSpillSlots() 3089 if (TRI->hasBasePointer(MF)) { in determineCalleeSaves()
|
| H A D | X86ISelLowering.cpp | 26178 if (RegInfo->hasBasePointer(MF)) in LowerINTRINSIC_WO_CHAIN() 35385 if (RegInfo->hasBasePointer(*MF)) { in emitEHSjLjSetJmp() 35814 if (RI.hasBasePointer(*MF)) { in EmitSjLjDispatchBlock() 36205 if (!Subtarget.is32Bit() || !TRI->hasBasePointer(*MF)) in EmitInstrWithCustomInserter() 36248 if (TRI->hasBasePointer(*MF) && in EmitInstrWithCustomInserter() 36282 if (!IsRBX || !TRI->hasBasePointer(*MF)) { in EmitInstrWithCustomInserter()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64RegisterInfo.h | 125 bool hasBasePointer(const MachineFunction &MF) const;
|
| H A D | AArch64RegisterInfo.cpp | 380 if (hasBasePointer(MF) && MCRegisterInfo::regsOverlap(PhysReg, AArch64::X19)) in explainReservedReg() 433 if (hasBasePointer(MF)) in getStrictlyReservedRegs() 532 bool AArch64RegisterInfo::hasBasePointer(const MachineFunction &MF) const { in hasBasePointer() function in AArch64RegisterInfo 978 - hasBasePointer(MF); // X19 in getRegPressureLimit()
|
| H A D | AArch64FrameLowering.cpp | 2091 if (!IsFunclet && RegInfo->hasBasePointer(MF)) { in emitPrologue() 2601 bool CanUseBP = RegInfo->hasBasePointer(MF); in resolveFrameOffsetReference() 2614 } else if (MF.hasEHFunclets() && !RegInfo->hasBasePointer(MF)) { in resolveFrameOffsetReference() 2651 FrameReg = RegInfo->hasBasePointer(MF) ? RegInfo->getBaseRegister() in resolveFrameOffsetReference() 2668 if (RegInfo->hasBasePointer(MF)) in resolveFrameOffsetReference() 3245 unsigned BasePointerReg = RegInfo->hasBasePointer(MF) in determineCalleeSaves()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCFrameLowering.cpp | 320 !RegInfo->hasBasePointer(MF); // No special alignment. in determineFrameLayout() 391 bool HasBP = RegInfo->hasBasePointer(MF); in replaceFPWithRealFP() 534 bool HasBP = RegInfo->hasBasePointer(MF); in twoUniqueScratchRegsRequired() 588 if (hasFP(MF) || RegInfo->hasBasePointer(MF) || MF.exposesReturnsTwice()) in stackUpdateCanBeMoved() 644 bool HasBP = RegInfo->hasBasePointer(MF); in emitPrologue() 1262 bool HasBP = RegInfo->hasBasePointer(MF); in inlineStackProbe() 1571 bool HasBP = RegInfo->hasBasePointer(MF); in emitEpilogue() 2010 if (!BPSI && RegInfo->hasBasePointer(MF)) { in determineCalleeSaves() 2031 if (RegInfo->hasBasePointer(MF)) in determineCalleeSaves() 2192 if (RegInfo->hasBasePointer(MF)) { in processFunctionBeforeFrameFinalized()
|
| H A D | PPCRegisterInfo.h | 173 bool hasBasePointer(const MachineFunction &MF) const;
|
| H A D | PPCRegisterInfo.cpp | 409 if (hasBasePointer(MF)) { in getReservedRegs() 1690 if (!(hasBasePointer(MF) && FrameIndex < 0)) in eliminateFrameIndex() 1826 if (!hasBasePointer(MF)) in getBaseRegister() 1838 bool PPCRegisterInfo::hasBasePointer(const MachineFunction &MF) const { in hasBasePointer() function in PPCRegisterInfo
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseRegisterInfo.h | 189 bool hasBasePointer(const MachineFunction &MF) const;
|
| H A D | ARMBaseRegisterInfo.cpp | 212 if (hasBasePointer(MF)) in getReservedRegs() 249 if (hasBasePointer(MF)) in isInlineAsmReadOnlyReg() 416 bool ARMBaseRegisterInfo::hasBasePointer(const MachineFunction &MF) const { in hasBasePointer() function in ARMBaseRegisterInfo
|
| H A D | ARMFrameLowering.cpp | 1253 if (RegInfo->hasBasePointer(MF)) { in emitPrologue() 1465 assert(RegInfo->hasBasePointer(MF) && in ResolveFrameIndexReference() 1477 if (isFixed || (hasMovingSP && !RegInfo->hasBasePointer(MF))) { in ResolveFrameIndexReference() 1481 assert(RegInfo->hasBasePointer(MF) && "missing base pointer!"); in ResolveFrameIndexReference() 1514 if (RegInfo->hasBasePointer(MF)) { in ResolveFrameIndexReference() 2328 if (RegInfo->hasBasePointer(MF)) in determineCalleeSaves() 2474 if (RegInfo->hasBasePointer(MF)) in determineCalleeSaves() 2494 bool HasBPOrFixedSP = RegInfo->hasBasePointer(MF) || !HasMovingSP; in determineCalleeSaves()
|
| H A D | Thumb1FrameLowering.cpp | 485 if (RegInfo->hasBasePointer(MF)) in emitPrologue()
|
| H A D | ARMExpandPseudoInsts.cpp | 2493 if (RI.hasBasePointer(MF)) { in ExpandMI()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.h | 112 bool hasBasePointer(const MachineFunction &MF) const;
|
| H A D | SIFrameLowering.cpp | 1086 TRI.hasBasePointer(MF) ? TRI.getBaseRegister() : Register(); in emitPrologue() 1189 if ((HasBP = TRI.hasBasePointer(MF))) { in emitPrologue() 1544 if (TRI->hasBasePointer(MF)) { in determinePrologEpilogSGPRSaves()
|
| H A D | SIRegisterInfo.cpp | 515 bool SIRegisterInfo::hasBasePointer(const MachineFunction &MF) const { in hasBasePointer() function in SIRegisterInfo 657 if (hasBasePointer(MF)) { in getReservedRegs() 1727 FrameInfo.isFixedObjectIndex(Index) && hasBasePointer(SB.MF) in buildVGPRSpillLoadStore() 2081 Register FrameReg = FrameInfo.isFixedObjectIndex(Index) && hasBasePointer(*MF) in eliminateFrameIndex()
|