| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | MachineValueType.h | 238 unsigned NElts = getVectorMinNumElements(); in isPow2VectorType() 273 unsigned getVectorMinNumElements() const { in getVectorMinNumElements() function 287 return ElementCount::get(getVectorMinNumElements(), isScalableVector()); in getVectorElementCount() 296 return getVectorMinNumElements(); in getVectorNumElements()
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| H A D | ValueTypes.h | 342 unsigned getVectorMinNumElements() const { in getVectorMinNumElements() function 449 unsigned NElts = getVectorMinNumElements(); in isPow2VectorType()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | LowLevelType.cpp | 20 bool asVector = VT.getVectorMinNumElements() > 1 || VT.isScalableVector(); in LLT()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 1464 unsigned VecElems = VecVT.getVectorMinNumElements(); in SplitVecRes_INSERT_SUBVECTOR() 1465 unsigned SubElems = SubVecVT.getVectorMinNumElements(); in SplitVecRes_INSERT_SUBVECTOR() 1466 unsigned LoElems = LoVT.getVectorMinNumElements(); in SplitVecRes_INSERT_SUBVECTOR() 4474 unsigned NumElts = VT.getVectorMinNumElements(); in WidenVecRes_BinaryCanTrap() 5270 unsigned InNumElts = InVT.getVectorMinNumElements(); in WidenVecRes_EXTRACT_SUBVECTOR() 5271 unsigned VTNumElts = VT.getVectorMinNumElements(); in WidenVecRes_EXTRACT_SUBVECTOR() 5879 unsigned VTNumElts = VT.getVectorMinNumElements(); in WidenVecRes_VECTOR_REVERSE() 6801 unsigned OrigElts = OrigVT.getVectorMinNumElements(); in WidenVecOp_VECREDUCE() 6802 unsigned WideElts = WideVT.getVectorMinNumElements(); in WidenVecOp_VECREDUCE() 6838 unsigned OrigElts = OrigVT.getVectorMinNumElements(); in WidenVecOp_VECREDUCE_SEQ() [all …]
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| H A D | SelectionDAG.cpp | 5790 assert(VT.getVectorMinNumElements() < in getNode() 5791 N1.getValueType().getVectorMinNumElements() && in getNode() 6942 VT.getVectorMinNumElements() <= N1VT.getVectorMinNumElements()) && in getNode() 6946 (VT.getVectorMinNumElements() + N2C->getZExtValue()) <= in getNode() 6947 N1VT.getVectorMinNumElements()) && in getNode() 6965 unsigned Factor = VT.getVectorMinNumElements(); in getNode() 7175 VT.getVectorMinNumElements() >= N2VT.getVectorMinNumElements()) && in getNode() 7181 VT.getVectorMinNumElements()) && in getNode() 12327 assert(LoVT.getVectorMinNumElements() + HiVT.getVectorMinNumElements() <= in SplitVector() 12328 N.getValueType().getVectorMinNumElements() && in SplitVector() [all …]
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| H A D | DAGCombiner.cpp | 14456 unsigned DstElts = N0.getValueType().getVectorMinNumElements(); in visitSIGN_EXTEND_INREG() 14457 unsigned SrcElts = N00.getValueType().getVectorMinNumElements(); in visitSIGN_EXTEND_INREG() 16962 NumElts = VT.getVectorMinNumElements(); in combineRepeatedFPDivisors() 23967 N->getOperand(0).getValueType().getVectorMinNumElements(); in visitCONCAT_VECTORS() 24208 unsigned NumElts = VT.getVectorMinNumElements(); in narrowExtractedVectorLoad() 24440 unsigned SrcNumElts = SrcVT.getVectorMinNumElements(); in visitEXTRACT_SUBVECTOR() 24441 unsigned DestNumElts = V.getValueType().getVectorMinNumElements(); in visitEXTRACT_SUBVECTOR() 24487 unsigned ExtNumElts = NVT.getVectorMinNumElements(); in visitEXTRACT_SUBVECTOR() 24494 unsigned ConcatSrcNumElts = ConcatSrcVT.getVectorMinNumElements(); in visitEXTRACT_SUBVECTOR() 26144 if (VT.getVectorMinNumElements() >= SrcVT.getVectorMinNumElements()) in visitINSERT_SUBVECTOR() [all …]
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| H A D | LegalizeIntegerTypes.cpp | 5572 unsigned NElts = NInVT.getVectorMinNumElements(); in PromoteIntRes_EXTRACT_SUBVECTOR() 5749 unsigned NumOutElem = NOutVT.getVectorMinNumElements(); in PromoteIntRes_CONCAT_VECTORS() 5930 unsigned OpNumElts = Op.getValueType().getVectorMinNumElements(); in PromoteIntOp_CONCAT_VECTORS()
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| H A D | SelectionDAGBuilder.cpp | 806 unsigned IntermediateNumElts = IntermediateVT.getVectorMinNumElements(); in getCopyToPartsVector() 11908 unsigned NumElts = VT.getVectorMinNumElements(); in visitVectorReverse() 11921 unsigned OutNumElts = OutVT.getVectorMinNumElements(); in visitVectorDeinterleave() 11957 unsigned NumElts = InVT.getVectorMinNumElements(); in visitVectorInterleave()
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| H A D | TargetLowering.cpp | 9785 unsigned NElts = VecVT.getVectorMinNumElements(); in clampDynamicVectorIndex() 10870 if (TrailingElts > VT.getVectorMinNumElements()) { in expandVectorSplice()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVTargetTransformInfo.cpp | 77 unsigned VL = VT.getVectorMinNumElements(); in getRISCVInstructionCost() 84 unsigned VL = VT.getVectorMinNumElements(); in getRISCVInstructionCost()
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| H A D | RISCVISelLowering.cpp | 168 if (VT.getVectorMinNumElements() < MinElts) in RISCVTargetLowering() 3825 unsigned NumOpElts = M1VT.getVectorMinNumElements(); in lowerBUILD_VECTOR() 4711 unsigned NumOpElts = M1VT.getVectorMinNumElements(); in lowerShuffleViaVRegSplitting() 9361 if (VecVT.getVectorMinNumElements() >= 8 && in lowerINSERT_SUBVECTOR() 9362 SubVecVT.getVectorMinNumElements() >= 8) { in lowerINSERT_SUBVECTOR() 9364 assert(VecVT.getVectorMinNumElements() % 8 == 0 && in lowerINSERT_SUBVECTOR() 9365 SubVecVT.getVectorMinNumElements() % 8 == 0 && in lowerINSERT_SUBVECTOR() 9537 if (VecVT.getVectorMinNumElements() >= 8 && in lowerEXTRACT_SUBVECTOR() 9538 SubVecVT.getVectorMinNumElements() >= 8) { in lowerEXTRACT_SUBVECTOR() 9540 assert(VecVT.getVectorMinNumElements() % 8 == 0 && in lowerEXTRACT_SUBVECTOR() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | CodeGenDAGPatterns.cpp | 672 return B.getVectorMinNumElements() < P.getVectorMinNumElements(); in EnforceVectorSubVectorTypeIs()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64TargetTransformInfo.cpp | 2171 DstTyL.first * DstTyL.second.getVectorMinNumElements(); in isWideningInstruction() 2173 SrcTyL.first * SrcTyL.second.getVectorMinNumElements(); in isWideningInstruction()
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| H A D | AArch64ISelLowering.cpp | 205 switch (VT.getVectorMinNumElements()) { in getPromotedVTForPredicate() 4825 unsigned ElementSize = 128 / Op.getValueType().getVectorMinNumElements(); in optimizeWhile() 5524 return DataVT.isFixedLengthVector() || DataVT.getVectorMinNumElements() > 2; in shouldRemoveExtendFromGSIndex() 12692 unsigned NumElts = N.getValueType().getVectorMinNumElements(); in isAllActivePredicate() 12699 if (N.getValueType().getVectorMinNumElements() < NumElts) in isAllActivePredicate() 12711 return N.getValueType().getVectorMinNumElements() >= NumElts; in isAllActivePredicate() 13594 unsigned NumElts = VT.getVectorMinNumElements(); in LowerINSERT_SUBVECTOR() 13641 assert(Idx == InVT.getVectorMinNumElements() && in LowerINSERT_SUBVECTOR() 16470 return (Index == 0 || Index == ResVT.getVectorMinNumElements()); in isExtractSubvectorCheap() 19044 Elt0->getConstantOperandVal(1) % VT.getVectorMinNumElements() == 0) { in performBuildVectorCombine() [all …]
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| H A D | AArch64ISelDAGToDAG.cpp | 1685 switch (VT.getVectorMinNumElements()) { in SelectOpcodeFromVT()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 1001 unsigned Index = NarrowVT.getVectorMinNumElements(); in PreprocessISelDAG() 1029 unsigned Index = NarrowVT.getVectorMinNumElements(); in PreprocessISelDAG()
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| H A D | X86ISelLowering.cpp | 42554 *DAG.getContext(), LowerOp.getValueType().getVectorMinNumElements()); in combineBitcastvxi1()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 2189 unsigned VecLen = VT.getVectorMinNumElements(); in getPreferredVectorAction()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 17117 128 / AVT.getVectorMinNumElements())), in PerformVECREDUCE_ADDCombine()
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