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Searched refs:getVRegDef (Results 1 – 25 of 104) sorted by relevance

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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonHardwareLoops.cpp469 MachineInstr *PredI = MRI->getVRegDef(PredR); in findInductionRegister()
505 IVOp = MRI->getVRegDef(F->first); in findInductionRegister()
608 MachineInstr *IV_Phi = MRI->getVRegDef(IVReg); in getLoopTripCount()
655 MachineInstr *CondI = MRI->getVRegDef(PredReg); in getLoopTripCount()
709 OldInsts.push_back(MRI->getVRegDef(R)); in getLoopTripCount()
719 OldInsts.push_back(MRI->getVRegDef(R)); in getLoopTripCount()
1433 MachineInstr *Def = MRI->getVRegDef(Reg); in loopCountMayWrapOrUnderFlow()
1510 MachineInstr *DI = MRI->getVRegDef(R); in checkForImmediate()
1582 MachineInstr *DI = MRI->getVRegDef(R); in setImmediate()
1692 MachineInstr *PredDef = MRI->getVRegDef(P); in fixupInductionVariable()
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H A DHexagonVExtract.cpp78 MachineInstr *DI = MRI.getVRegDef(ExtIdxR); in genElemLoad()
149 MachineInstr *DefI = MRI.getVRegDef(VecR); in runOnMachineFunction()
183 MachineInstr *AlignaI = MRI.getVRegDef(AR); in runOnMachineFunction()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DMLxExpansionPass.cpp94 MachineInstr *DefMI = MRI->getVRegDef(Reg); in getAccDefMI()
101 DefMI = MRI->getVRegDef(Reg); in getAccDefMI()
107 DefMI = MRI->getVRegDef(Reg); in getAccDefMI()
146 MachineInstr *DefMI = MRI->getVRegDef(Reg); in hasLoopHazard()
157 DefMI = MRI->getVRegDef(SrcReg); in hasLoopHazard()
165 DefMI = MRI->getVRegDef(Reg); in hasLoopHazard()
171 DefMI = MRI->getVRegDef(Reg); in hasLoopHazard()
H A DA15SDOptimizer.cpp157 MachineInstr *MI = MRI->getVRegDef(SReg); in getPrefSPRLane()
250 MachineInstr *DPRMI = MRI->getVRegDef(MI->getOperand(1).getReg()); in optimizeSDPattern()
251 MachineInstr *SPRMI = MRI->getVRegDef(MI->getOperand(2).getReg()); in optimizeSDPattern()
302 MachineInstr *Def = MRI->getVRegDef(OpReg); in optimizeSDPattern()
345 MachineInstr *Def = MRI->getVRegDef(MI->getOperand(1).getReg()); in elideCopies()
372 MachineInstr *NewMI = MRI->getVRegDef(Reg); in elideCopiesAndPHIs()
380 MachineInstr *NewMI = MRI->getVRegDef(MI->getOperand(1).getReg()); in elideCopiesAndPHIs()
602 MachineInstr *Def = MRI->getVRegDef(I); in runOnInstruction()
H A DMVETPAndVPTOptimisationsPass.cpp104 MI = MRI->getVRegDef(MI->getOperand(1).getReg()); in INITIALIZE_PASS_DEPENDENCY()
153 LookThroughCOPY(MRI->getVRegDef(LoopEnd->getOperand(0).getReg()), MRI); in findLoopComponents()
162 LookThroughCOPY(MRI->getVRegDef(LoopDec->getOperand(1).getReg()), MRI); in findLoopComponents()
175 LoopStart = LookThroughCOPY(MRI->getVRegDef(StartReg), MRI); in findLoopComponents()
493 MachineInstr *Phi = LookThroughCOPY(MRI->getVRegDef(CountReg), MRI); in ConvertTailPredLoop()
936 MachineInstr *Copy = MRI->getVRegDef(VPR); in ReplaceConstByVPNOTs()
947 MachineInstr *Def = MRI->getVRegDef(GPR); in ReplaceConstByVPNOTs()
965 DeadInstructions.insert(MRI->getVRegDef(GPR)); in ReplaceConstByVPNOTs()
983 DeadInstructions.insert(MRI->getVRegDef(GPR)); in ReplaceConstByVPNOTs()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCMIPeephole.cpp216 return MRI->getVRegDef(Reg); in getVRegDefOrNull()
224 MachineInstr *MI = MRI->getVRegDef(Reg); in getKnownLeadingZeroCount()
358 MachineInstr *Instr = MRI->getVRegDef(RegOp); in collectUnprimedAccPHIs()
400 MachineInstr *PHIInput = MRI->getVRegDef(RegOp); in convertUnprimedAccPHIs()
564 MachineInstr *RootPHI = MRI->getVRegDef(Src); in simplifyCode()
1072 MachineInstr *SrcMI = MRI->getVRegDef(SrcReg); in simplifyCode()
1086 SrcMI = MRI->getVRegDef(CopyReg); in simplifyCode()
1450 MachineInstr *Inst = MRI->getVRegDef(SrcReg); in getSrcVReg()
1484 MachineInstr *CMPI = MRI->getVRegDef(CndReg); in eligibleForCompareElimination()
1884 MachineInstr *SrcMI = MRI->getVRegDef(SrcReg); in emitRLDICWhenLoweringJumpTables()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DGIMatchTableExecutor.cpp50 MachineInstr *RootI = MRI.getVRegDef(Root.getReg()); in isBaseWithConstantOffset()
55 MachineInstr *RHSI = MRI.getVRegDef(RHS.getReg()); in isBaseWithConstantOffset()
H A DCombinerHelper.cpp245 MachineInstr *Def = MRI.getVRegDef(Reg); in matchCombineConcatVectors()
1038 auto *PtrDef = MRI.getVRegDef(Ptr); in findPostIndexCandidate()
1843 auto *SrcDef = MRI.getVRegDef(SrcReg); in matchCommuteShift()
2751 auto *MI = MRI.getVRegDef(MOP.getReg()); in matchConstantOp()
3275 MachineInstr *Def = MRI.getVRegDef(Reg); in matchNotCmp()
3329 MachineInstr *Def = MRI.getVRegDef(Reg); in applyNotCmp()
3459 Select = MRI.getVRegDef(RHS); in matchFoldBinOpIntoSelect()
3948 auto *SrcMI = MRI.getVRegDef(SrcReg); in applyExtendThroughPhis()
5136 auto *RHSDef = MRI.getVRegDef(RHS); in matchUDivByConst()
6240 auto *LHSDef = MRI.getVRegDef(LHS); in matchCommuteConstantToRHS()
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H A DUtils.cpp96 MachineInstr *RegDef = MRI.getVRegDef(Reg); in constrainOperandRegClass()
324 while ((MI = MRI.getVRegDef(VReg)) && !IsConstantOpcode(MI) && in getConstantVRegValWithLookThrough()
440 MachineInstr *MI = MRI.getVRegDef(VReg); in getConstantFPVRegVal()
449 auto *DefMI = MRI.getVRegDef(Reg); in getDefSrcRegIgnoringCopies()
459 DefMI = MRI.getVRegDef(SrcReg); in getDefSrcRegIgnoringCopies()
789 const MachineInstr *DefMI = MRI.getVRegDef(Val); in isKnownNeverNaN()
889 MachineInstr *Def = MRI.getVRegDef(LiveIn); in getFunctionLiveInPhysReg()
1228 if (AllowUndef && isa<GImplicitDef>(MRI.getVRegDef(Element))) in getAnyConstantSplat()
1377 const MachineInstr *ElementDef = MRI.getVRegDef(MI.getOperand(I).getReg()); in isConstantOrConstantVector()
1512 DeadInstChain.insert(MRI.getVRegDef(Op.getReg())); in saveUsesAndErase()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DLegalizationArtifactCombiner.h79 markInstAndDefDead(MI, *MRI.getVRegDef(SrcReg), DeadInsts); in tryCombineAnyExt()
97 auto *SrcMI = MRI.getVRegDef(SrcReg); in tryCombineAnyExt()
155 markInstAndDefDead(MI, *MRI.getVRegDef(SrcReg), DeadInsts); in tryCombineZExt()
167 markDefDead(MI, *MRI.getVRegDef(SrcReg), DeadInsts); in tryCombineZExt()
172 auto *SrcMI = MRI.getVRegDef(SrcReg); in tryCombineZExt()
209 markInstAndDefDead(MI, *MRI.getVRegDef(SrcReg), DeadInsts); in tryCombineSExt()
223 markInstAndDefDead(MI, *MRI.getVRegDef(SrcReg), DeadInsts); in tryCombineSExt()
228 auto *SrcMI = MRI.getVRegDef(SrcReg); in tryCombineSExt()
257 auto *SrcMI = MRI.getVRegDef(SrcReg); in tryCombineTrunc()
1252 MachineInstr *MergeI = MRI.getVRegDef(SrcReg); in tryCombineExtract()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVPreLegalizer.cpp64 auto *BuildVec = MRI.getVRegDef(MI.getOperand(2).getReg()); in addConstantsToTrack()
77 MachineInstr *SrcMI = MRI.getVRegDef(MI.getOperand(2).getReg()); in addConstantsToTrack()
109 MachineInstr *ConstMI = MRI.getVRegDef(MOp.getReg()); in foldConstantsIntoIntrinsics()
195 MachineInstr *Def = Op.isReg() ? MRI.getVRegDef(Op.getReg()) : nullptr; in propagateSPIRVType()
221 MachineInstr *Def = MRI.getVRegDef(Reg); in insertAssignInstr()
273 MachineInstr *Def = MRI.getVRegDef(Reg); in generateAssignInstrs()
281 MachineInstr *Def = MRI.getVRegDef(Reg); in generateAssignInstrs()
310 MachineInstr *ElemMI = MRI.getVRegDef(MI.getOperand(1).getReg()); in generateAssignInstrs()
411 unsigned Opcode = MRI.getVRegDef(SrcReg)->getOpcode(); in processInstrsWithTypeFolding()
H A DSPIRVUtils.cpp212 MachineInstr *ConstInstr = MRI->getVRegDef(ConstReg); in getDefInstrMaybeConstant()
216 return MRI->getVRegDef(ConstReg); in getDefInstrMaybeConstant()
220 return MRI->getVRegDef(ConstReg); in getDefInstrMaybeConstant()
222 return MRI->getVRegDef(ConstReg); in getDefInstrMaybeConstant()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFMIPeephole.cpp111 MachineInstr *DefInsn = MRI->getVRegDef(Reg); in isCopyFrom32Def()
126 MachineInstr *PhiDef = MRI->getVRegDef(opnd.getReg()); in isPhiFrom32Def()
163 MachineInstr *DefInsn = MRI->getVRegDef(MovMI->getOperand(1).getReg()); in isMovFrom32Def()
198 MachineInstr *SllMI = MRI->getVRegDef(ShfReg); in eliminateZExtSeq()
212 MachineInstr *MovMI = MRI->getVRegDef(SllMI->getOperand(1).getReg()); in eliminateZExtSeq()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/
H A DModuloSchedule.cpp456 InstOp1 = MRI.getVRegDef(PhiOp1); in generateExistingPhis()
474 MachineInstr *PhiInst = MRI.getVRegDef(LoopVal); in generateExistingPhis()
809 MachineInstr *MI = MRI.getVRegDef(LCDef); in splitLifetimes()
939 MachineInstr *BaseDef = MRI.getVRegDef(BaseReg); in computeDelta()
942 BaseDef = MRI.getVRegDef(BaseReg); in computeDelta()
1041 MachineInstr *Def = MRI.getVRegDef(reg); in updateInstruction()
1062 MachineInstr *Def = MRI.getVRegDef(Reg); in findDefInLoop()
1081 MachineInstr *LoopInst = MRI.getVRegDef(LoopVal); in getPrevMapVal()
1206 MachineInstr *Use = MRI.getVRegDef(LoopVal); in isLoopCarried()
1487 MachineInstr *MI = MRI.getVRegDef(R); in phi()
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H A DMachineCycleAnalysis.cpp141 assert(MRI->getVRegDef(Reg) && "Machine instr not mapped for this vreg?!"); in isCycleInvariant()
145 if (Cycle->contains(MRI->getVRegDef(Reg)->getParent())) in isCycleInvariant()
H A DOptimizePHIs.cpp115 MachineInstr *SrcMI = MRI->getVRegDef(SrcReg); in IsSingleValuePHICycle()
122 SrcMI = MRI->getVRegDef(SrcReg); in IsSingleValuePHICycle()
H A DMIRVRegNamerUtils.cpp81 return MRI.getVRegDef(MO.getReg())->getOpcode(); in getInstructionOpcodeHash()
143 std::string Name = getInstructionOpcodeHash(*MRI.getVRegDef(VReg)); in createVirtualRegister()
H A DLiveVariables.cpp129 assert(MRI->getVRegDef(Reg) && "Register use before def!"); in HandleVirtRegUse()
164 if (MBB == MRI->getVRegDef(Reg)->getParent()) in HandleVirtRegUse()
175 MarkVirtRegAliveInBlock(VRInfo, MRI->getVRegDef(Reg)->getParent(), Pred); in HandleVirtRegUse()
573 MarkVirtRegAliveInBlock(getVarInfo(I), MRI->getVRegDef(I)->getParent(), in runOnBlock()
634 if (VirtRegInfo[Reg].Kills[j] == MRI->getVRegDef(Reg)) in runOnMachineFunction()
788 const MachineInstr *Def = MRI.getVRegDef(Reg); in isLiveIn()
H A DMachineLoopInfo.cpp244 assert(MRI->getVRegDef(Reg) && in isLoopInvariant()
249 if (contains(MRI->getVRegDef(Reg))) in isLoopInvariant()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64PostLegalizerCombiner.cpp92 MachineInstr *Other = MRI.getVRegDef(Src1Op1); in matchExtractVecEltPairwiseAdd()
95 Other = MRI.getVRegDef(Src1Op2); in matchExtractVecEltPairwiseAdd()
100 Other == MRI.getVRegDef(Shuffle->getOperand(1).getReg())) { in matchExtractVecEltPairwiseAdd()
127 unsigned Opc = MRI.getVRegDef(R)->getOpcode(); in isSignExtended()
133 return MRI.getVRegDef(R)->getOpcode() == TargetOpcode::G_ZEXT; in isZeroExtended()
319 *MRI.getVRegDef(Store.getValueReg()), MRI); in matchSplitStoreZero128()
668 GPtrAdd *PtrAdd = cast<GPtrAdd>(MRI.getVRegDef(PtrReg)); in optimizeConsecutiveMemOpAddressing()
H A DAArch64RegisterBankInfo.cpp555 onlyDefinesFP(*MRI.getVRegDef(Op.getReg()), MRI, TRI, Depth + 1); in hasFPConstraints()
786 auto ScalarDef = MRI.getVRegDef(ScalarReg); in getInstrMapping()
889 MachineInstr *DefMI = MRI.getVRegDef(VReg); in getInstrMapping()
900 MachineInstr *DefMI = MRI.getVRegDef(VReg); in getInstrMapping()
959 MachineInstr *DefMI = MRI.getVRegDef(VReg); in getInstrMapping()
1039 MachineInstr *DefMI = MRI.getVRegDef(VReg); in getInstrMapping()
1043 return Op.isDef() || MRI.getVRegDef(Op.getReg())->getOpcode() == in getInstrMapping()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86FastPreTileConfig.cpp292 MachineInstr *MI = MRI->getVRegDef(TileReg); in getShape()
350 MachineInstr *TileDefMI = MRI->getVRegDef(InTileReg); in convertPHI()
376 MachineInstr *TileLoad = MRI->getVRegDef(InTileReg); in convertPHI()
463 DefMI = MRI->getVRegDef(InTileReg); in canonicalizePHIs()
604 MachineInstr *RowMI = MRI->getVRegDef(RowMO->getReg()); in configBasicBlock()
605 MachineInstr *ColMI = MRI->getVRegDef(ColMO->getReg()); in configBasicBlock()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyFixBrTableDefaults.cpp62 auto ExtMI = MF.getRegInfo().getVRegDef(MI.getOperand(0).getReg()); in fixBrTableIndex()
128 auto *RangeCheck = MRI.getVRegDef(Cond[1].getReg()); in fixBrTableDefault()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInsertVSETVLI.cpp193 if (MachineInstr *UseMI = MRI.getVRegDef(UseMO.getReg())) { in hasUndefinedMergeOp()
199 MachineInstr *SourceMI = MRI.getVRegDef(UseMI->getOperand(i).getReg()); in hasUndefinedMergeOp()
514 if (MachineInstr *MI = MRI.getVRegDef(getAVLReg()); in hasNonZeroAVL()
894 MachineInstr *DefMI = MRI->getVRegDef(InstrInfo.getAVLReg()); in computeInfoForInstr()
936 if (MachineInstr *DefMI = MRI->getVRegDef(Info.getAVLReg())) { in insertVSETVLI()
1058 if (MachineInstr *DefMI = MRI->getVRegDef(Require.getAVLReg())) { in needVSETVLI()
1251 MachineInstr *PHI = MRI->getVRegDef(AVLReg); in needVSETVLIPHI()
1266 MachineInstr *DefMI = MRI->getVRegDef(InReg); in needVSETVLIPHI()
1322 MachineInstr *VLOpDef = MRI->getVRegDef(Reg); in emitVSETVLIs()
1420 MachineInstr *AVLDefMI = MRI->getVRegDef(AvailableInfo.getAVLReg()); in doPRE()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIFoldOperands.cpp658 MachineInstr *Def = MRI->getVRegDef(UseReg); in getRegSeqInit()
669 SubDef = MRI->getVRegDef(Sub->getReg())) { in getRegSeqInit()
715 MachineInstr *Def = MRI->getVRegDef(UseReg); in tryToFoldACImm()
1178 MachineInstr *Def = MRI->getVRegDef(Op.getReg()); in getImmOrMaterializedImm()
1341 MachineInstr *SrcDef = MRI->getVRegDef(Src1); in tryFoldZeroHighBits()
1478 InstToErase = MRI->getVRegDef(SrcReg); in tryFoldFoldableCopy()
1544 MachineInstr *Def = MRI->getVRegDef(ClampSrc->getReg()); in tryFoldClamp()
1705 MachineInstr *Def = MRI->getVRegDef(RegOp->getReg()); in tryFoldOMod()
1893 MachineInstr *Copy = MRI->getVRegDef(MO.getReg()); in tryFoldPhiAGPR()
1927 if (MachineInstr *Def = MRI->getVRegDef(Reg)) { in tryFoldPhiAGPR()
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