| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ValueTypes.h | 373 TypeSize getStoreSize() const { in getStoreSize() function 381 return getScalarType().getStoreSize().getFixedValue(); in getScalarStoreSize() 391 return getStoreSize() * 8; in getStoreSizeInBits()
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| H A D | MachineValueType.h | 352 TypeSize getStoreSize() const { in getStoreSize() function 360 return getScalarType().getStoreSize().getFixedValue(); in getScalarStoreSize() 370 return getStoreSize() * 8; in getStoreSizeInBits()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrFragmentsSIMD.td | 870 return St->getAlign() >= St->getMemoryVT().getStoreSize(); 876 return Ld->getAlign() >= Ld->getMemoryVT().getStoreSize(); 944 Ld->getAlign() >= Ld->getMemoryVT().getStoreSize(); 982 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 2; 987 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 4; 992 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 8; 997 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 8; 1002 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 1; 1007 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 2; 1012 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 4; [all …]
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| H A D | X86InstrFragments.td | 517 return Ld->getAlign() >= Ld->getMemoryVT().getStoreSize(); 522 Ld->getAlign() >= Ld->getMemoryVT().getStoreSize();
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVTargetTransformInfo.h | 205 if (!ST->hasFastUnalignedAccess() && Alignment < ElemType.getStoreSize()) in isLegalMaskedLoadStore() 230 if (!ST->hasFastUnalignedAccess() && Alignment < ElemType.getStoreSize()) in isLegalMaskedGatherScatter()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZCallingConv.h | 43 return ArgVT.isVector() && ArgVT.getStoreSize() <= 8; in IsShortVectorType()
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| H A D | SystemZISelLowering.cpp | 1944 assert((PartOffset + PartValue.getValueType().getStoreSize() <= in LowerCall() 5082 unsigned BytesPerElement = VT.getVectorElementType().getStoreSize(); in getVPermMask() 5307 unsigned BytesPerElement = VT.getVectorElementType().getStoreSize(); in addUndef() 5319 unsigned BytesPerElement = VT.getVectorElementType().getStoreSize(); in add() 6580 unsigned TruncBytes = TruncVT.getStoreSize(); in combineTruncateExtract() 6593 VecVT.getStoreSize() / TruncBytes); in combineTruncateExtract() 6717 unsigned ElemBytes = VT.getVectorElementType().getStoreSize(); in combineMERGE() 6868 if (CurrMemVT.isRound() && CurrMemVT.getStoreSize() <= 16) in isOnlyUsedByStores() 7002 isInt<16>(C->getSExtValue()) || MemVT.getStoreSize() <= 2) in combineSTORE() 7042 FindReplicatedImm(C, SplatVal.getValueType().getStoreSize()); in combineSTORE() [all …]
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| H A D | SystemZISelDAGToDAG.cpp | 1470 uint64_t Size = Load->getMemoryVT().getStoreSize(); in canUseBlockOperation() 1486 uint64_t Size = Load->getMemoryVT().getStoreSize(); in storeLoadCanUseMVC() 1511 TypeSize StoreSize = MemAccess->getMemoryVT().getStoreSize(); in storeLoadIsAligned()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelDAGToDAG.cpp | 303 cast<MemSDNode>(Node)->getMemoryVT().getStoreSize()) && in Select()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCTargetTransformInfo.cpp | 799 unsigned SrcBytes = LT.second.getStoreSize(); in getMemoryOpCost() 811 *Alignment >= LT.second.getScalarType().getStoreSize()) in getMemoryOpCost()
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| H A D | PPCISelLowering.cpp | 3990 unsigned ArgSize = ArgVT.getStoreSize(); in CalculateStackSlotSize() 4034 Alignment = Align(OrigVT.getStoreSize()); in CalculateStackSlotAlignment() 4036 Alignment = Align(ArgVT.getStoreSize()); in CalculateStackSlotAlignment() 4449 unsigned ObjSize = ObjectVT.getStoreSize(); in LowerFormalArguments_64SVR4() 6813 const unsigned StoreSize = LocVT.getStoreSize(); in CC_AIX() 7109 const unsigned LocSize = LocVT.getStoreSize(); in LowerFormalArguments_AIX() 7612 if (Arg.getValueType().getStoreSize() == LocVT.getStoreSize()) in LowerCall_AIX() 17051 Info.offset = -VT.getStoreSize()+1; in getTgtMemIntrinsic() 17052 Info.size = 2*VT.getStoreSize()-1; in getTgtMemIntrinsic() 17091 Info.offset = -VT.getStoreSize()+1; in getTgtMemIntrinsic() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCISelLowering.cpp | 540 unsigned ObjSize = VA.getLocVT().getStoreSize(); in LowerCallArguments() 680 unsigned ObjSize = VA.getLocVT().getStoreSize(); in LowerReturn()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VECustomDAG.cpp | 310 .getStoreSize(); in getLoadStoreStride()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 1269 unsigned TotalBytes = VT.getStoreSize(); in analyzeArguments() 1274 TotalBytes += Args[j].VT.getStoreSize(); in analyzeArguments() 1311 RegIdx -= VT.getStoreSize(); in analyzeArguments() 1324 TotalBytes += Arg.VT.getStoreSize(); in getTotalArgumentsSizeInBytes() 1379 RegIdx -= VT.getStoreSize(); in analyzeReturnValues()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 1141 if (Alignment < MemVT.getStoreSize() && in LowerSTORE() 1268 assert(Load->getAlign() >= MemVT.getStoreSize()); in lowerPrivateExtLoad() 1510 Align Alignment = commonAlignment(Align(VT.getStoreSize()), PartOffset); in LowerFormalArguments()
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| H A D | AMDGPUISelLowering.cpp | 1217 PartOffset += MemVT.getStoreSize(); in analyzeFormalArgumentsCompute() 1754 unsigned Size = LoMemVT.getStoreSize(); in SplitVectorLoad() 1764 HiPtr, SrcValue.getWithOffset(LoMemVT.getStoreSize()), in SplitVectorLoad() 1844 SDValue HiPtr = DAG.getObjectPtrOffset(SL, BasePtr, LoMemVT.getStoreSize()); in SplitVectorStore() 1848 unsigned Size = LoMemVT.getStoreSize(); in SplitVectorStore() 3733 unsigned Size = VT.getStoreSize(); in shouldCombineMemoryType() 3759 unsigned Size = VT.getStoreSize(); in performLoadCombine() 3809 unsigned Size = VT.getStoreSize(); in performStoreCombine() 5279 int FI = getOrCreateFixedStackObject(MFI, VT.getStoreSize(), Offset); in loadStackInputValue()
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| H A D | SIISelLowering.cpp | 1988 if (MemVT.getStoreSize() < 4 && Alignment < 4) { in lowerKernargMemParameter() 2035 unsigned ArgSize = VA.getValVT().getStoreSize(); in lowerStackParameter() 2467 if (ArgLoc.getLocVT().getStoreSize() < 4 && Alignment < 4) { in allocatePreloadKernArgSGPRs() 2882 if (MemVT.getStoreSize() < 4 && Alignment < 4) { in LowerFormalArguments() 3325 CCInfo.AllocateStack(ArgVT.getStoreSize(), Align(4)); in passSpecialInputs() 3716 Flags.getByValSize() : VA.getValVT().getStoreSize(); in LowerCall() 5958 VT.getStoreSize(), Alignment); in ReplaceNodeResults() 7841 VT.getStoreSize(), Alignment); in lowerSBuffer() 7864 MF.getMachineMemOperand(MMO, 0, WidenedVT.getStoreSize())); in lowerSBuffer() 10116 Alignment.value() < MemVT.getStoreSize() && MemVT.getSizeInBits() > 32) { in LowerLOAD() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeTypesGeneric.cpp | 165 SDValue StackPtr = DAG.CreateStackTemporary(InVT.getStoreSize(), Align); in ExpandRes_BITCAST()
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| H A D | LegalizeTypes.cpp | 907 DAG.CreateStackTemporary(Op.getValueType().getStoreSize(), Align); in CreateStackStoreLoad()
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| H A D | LegalizeVectorTypes.cpp | 1491 DAG.CreateStackTemporary(VecVT.getStoreSize(), SmallestAlign); in SplitVecRes_INSERT_SUBVECTOR() 1809 DAG.CreateStackTemporary(VecVT.getStoreSize(), SmallestAlign); in SplitVecRes_INSERT_VECTOR_ELT() 1988 LoMemVT.getStoreSize().getFixedValue()); in SplitVecRes_VP_LOAD() 2152 LoMemVT.getStoreSize().getFixedValue()); in SplitVecRes_MLOAD() 2878 SDValue StackPtr = DAG.CreateStackTemporary(MemVT.getStoreSize(), Alignment); in SplitVecRes_VP_REVERSE() 3336 DAG.CreateStackTemporary(VecVT.getStoreSize(), SmallestAlign); in SplitVecOp_EXTRACT_SUBVECTOR() 3392 DAG.CreateStackTemporary(VecVT.getStoreSize(), SmallestAlign); in SplitVecOp_EXTRACT_VECTOR_ELT() 3499 LoMemVT.getStoreSize().getFixedValue()); in SplitVecOp_VP_STORE() 3649 LoMemVT.getStoreSize().getFixedValue()); in SplitVecOp_MSTORE()
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| H A D | StatepointLowering.cpp | 113 unsigned SpillSize = ValueType.getStoreSize(); in allocateStackSlot()
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| H A D | SelectionDAG.cpp | 2466 return CreateStackTemporary(VT.getStoreSize(), StackAlign); in CreateStackTemporary() 2470 TypeSize VT1Size = VT1.getStoreSize(); in CreateStackTemporary() 2471 TypeSize VT2Size = VT2.getStoreSize(); in CreateStackTemporary() 8331 Size = MemVT.getStoreSize(); in getMemIntrinsicNode() 8493 uint64_t Size = MemoryLocation::getSizeOrUnknown(MemVT.getStoreSize()); in getLoad() 8615 MemoryLocation::getSizeOrUnknown(Val.getValueType().getStoreSize()); in getStore() 8668 PtrInfo, MMOFlags, MemoryLocation::getSizeOrUnknown(SVT.getStoreSize()), in getTruncStore() 8763 uint64_t Size = MemoryLocation::getSizeOrUnknown(MemVT.getStoreSize()); in getLoadVP() 8916 PtrInfo, MMOFlags, MemoryLocation::getSizeOrUnknown(SVT.getStoreSize()), in getTruncStoreVP() 11768 assert(memvt.getStoreSize().getKnownMinValue() <= MMO->getSize() && in MemSDNode()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 1251 uint64_t SlotSize = PtrVT.getStoreSize(); in getReturnAddressFrameIndex() 1275 DAG.getConstant(PtrVT.getStoreSize(), dl, MVT::i16); in LowerRETURNADDR()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelDAGToDAG.cpp | 1632 return N->getAlign().value() >= N->getMemoryVT().getStoreSize(); in isAlignedMemNode() 1637 switch (N->getMemoryVT().getStoreSize()) { in isSmallStackStore()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 1399 return St->getAlign() >= St->getMemoryVT().getStoreSize(); 1405 return St->getAlignment() < St->getMemoryVT().getStoreSize(); 1417 return Ld->getAlign() >= Ld->getMemoryVT().getStoreSize();
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