| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 1575 CondCode getSetCCInverse(CondCode Operation, EVT Type);
1595 CondCode getSetCCInverse(CondCode Operation, bool isIntegerLike);
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 836 ISD::CondCode InverseCC = ISD::getSetCCInverse(CCOpcode, CompareVT); in LowerSELECT_CC()
876 ISD::CondCode CCInv = ISD::getSetCCInverse(CCOpcode, CompareVT); in LowerSELECT_CC()
902 CCOpcode = ISD::getSetCCInverse(CCOpcode, CompareVT); in LowerSELECT_CC()
1867 LHSCC = ISD::getSetCCInverse(LHSCC, LHS.getOperand(0).getValueType()); in PerformDAGCombine()
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| H A D | AMDGPUISelLowering.cpp | 4593 getSetCCInverse(cast<CondCodeSDNode>(CC)->get(), LHS.getValueType()); in performSelectCombine()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 2814 CC = getSetCCInverse(CC, VT0); in combineSelect()
2878 CC = getSetCCInverse(CC, LHSVT); in combineSelectCC()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 416 CCCode = getSetCCInverse(CCCode, RetVT); in softenSetCCOperands()
429 CCCode = getSetCCInverse(CCCode, RetVT); in softenSetCCOperands()
3980 Cond = ISD::getSetCCInverse(Cond, OpVT); in foldSetCCWithAnd()
4069 NewCond = getSetCCInverse(NewCond, XVT); in optimizeSetCCOfSignedTruncationCheck()
4577 ISD::CondCode InvCond = ISD::getSetCCInverse( in SimplifySetCC()
4736 CC = ISD::getSetCCInverse(CC, N0.getOperand(0).getValueType()); in SimplifySetCC()
10913 InvCC = getSetCCInverse(CCCode, OpVT); in LegalizeSetCCCondCode()
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| H A D | SelectionDAG.cpp | 599 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, EVT Type) { in getSetCCInverse() function in ISD
603 ISD::CondCode ISD::GlobalISel::getSetCCInverse(ISD::CondCode Op, in getSetCCInverse() function in ISD::GlobalISel
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| H A D | LegalizeDAG.cpp | 4116 ISD::CondCode InvCC = ISD::getSetCCInverse(CCOp, Tmp1.getValueType()); in ExpandNode()
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| H A D | DAGCombiner.cpp | 9442 ISD::CondCode NotCC = ISD::getSetCCInverse(cast<CondCodeSDNode>(CC)->get(), in visitXOR()
12288 SatCC = ISD::getSetCCInverse(SatCC, VT.getScalarType()); in visitVSELECT()
12335 SatCC = ISD::getSetCCInverse(SatCC, VT.getScalarType()); in visitVSELECT()
27339 CC = ISD::getSetCCInverse(CC, CmpOpVT); in SimplifySelectCC()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 7045 if (CC == ISD::getSetCCInverse(CC2, LHS2.getValueType())) in matchSetCC()
7051 if (CC == ISD::getSetCCInverse(CC2, LHS2.getValueType())) in matchSetCC()
7329 TargetCC = DAG.getCondCode(ISD::getSetCCInverse(CCVal, LHS.getValueType())); in lowerSELECT()
12559 CCVal = ISD::getSetCCInverse(CCVal, SetCCOpVT); in combineSubOfBoolean()
14416 CCVal = ISD::getSetCCInverse(CCVal, SetCCOpVT); in tryDemorganOfBooleanCondition()
14462 CCVal = ISD::getSetCCInverse(CCVal, LHS.getValueType()); in combine_CC()
14506 CCVal = ISD::getSetCCInverse(CCVal, LHS.getValueType()); in combine_CC()
14514 CCVal = ISD::getSetCCInverse(CCVal, LHS.getValueType()); in combine_CC()
15450 DAG.getSetCC(DL, VT, LHS, RHS, ISD::getSetCCInverse(CCVal, VT)); in PerformDAGCombine()
15458 DAG.getSetCC(DL, VT, LHS, RHS, ISD::getSetCCInverse(CCVal, VT)); in PerformDAGCombine()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 3118 changeFPCCToAArch64CC(getSetCCInverse(CC, /* FP inverse */ MVT::f32), in changeVectorFPCCToAArch64CC()
3393 CC = getSetCCInverse(CC, LHS.getValueType()); in emitConjunctionRec()
3827 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerXOR()
9432 changeFPCCToAArch64CC(ISD::getSetCCInverse(CC, LHS.getValueType()), CC1, in LowerSETCC()
9478 ISD::CondCode CondInv = ISD::getSetCCInverse(Cond, VT); in LowerSETCCCARRY()
9556 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerSELECT_CC()
9560 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerSELECT_CC()
9567 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerSELECT_CC()
9575 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerSELECT_CC()
9624 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerSELECT_CC()
[all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 707 ISD::getSetCCInverse(CC, SetCC.getValueType())); in performSELECTCombine()
742 ISD::getSetCCInverse(CC, SetCC.getValueType())); in performSELECTCombine()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 2188 ISD::CondCode NewCC = ISD::GlobalISel::getSetCCInverse(CC, true); in LowerSETCC()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 5464 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerSELECT_CC()
5474 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerSELECT_CC()
5483 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerSELECT_CC()
5525 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerSELECT_CC()
18241 CC = ISD::getSetCCInverse(CC, /* Integer inverse */ MVT::i32); in PerformHWLoopCombine()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 4040 CC = ISD::getSetCCInverse(CC, InputVT); in getSETCCInGPR()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 3236 CC = ISD::getSetCCInverse(CC, Mode == CmpMode::Int ? MVT::i32 : MVT::f32); in getVectorComparisonOrInvert()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 44478 ISD::CondCode NewCC = ISD::getSetCCInverse( in combineVSelectWithAllOnesOrZeros()
44815 ISD::getSetCCInverse(cast<CondCodeSDNode>(Cond.getOperand(2))->get(), in commuteSelect()
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