| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeIntegerTypes.cpp | 3022 Lo = DAG.getSelect(dl, NVT, isShort, LoS, LoL); in ExpandShiftWithUnknownAmountBit() 3023 Hi = DAG.getSelect(dl, NVT, isZero, InH, in ExpandShiftWithUnknownAmountBit() 3039 Lo = DAG.getSelect(dl, NVT, isZero, InL, in ExpandShiftWithUnknownAmountBit() 3041 Hi = DAG.getSelect(dl, NVT, isShort, HiS, HiL); in ExpandShiftWithUnknownAmountBit() 3055 Lo = DAG.getSelect(dl, NVT, isZero, InL, in ExpandShiftWithUnknownAmountBit() 3057 Hi = DAG.getSelect(dl, NVT, isShort, HiS, HiL); in ExpandShiftWithUnknownAmountBit() 3643 Lo = DAG.getSelect(dl, NVT, HiIsNeg, NegLo, Lo); in ExpandIntRes_ABS() 3644 Hi = DAG.getSelect(dl, NVT, HiIsNeg, NegHi, Hi); in ExpandIntRes_ABS() 3660 Lo = DAG.getSelect(dl, NVT, HiNotZero, HiLZ, in ExpandIntRes_CTLZ() 3691 Lo = DAG.getSelect(dl, NVT, LoNotZero, LoLZ, in ExpandIntRes_CTTZ() [all …]
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| H A D | LegalizeVectorOps.cpp | 933 Results.push_back(DAG.getSelect(SDLoc(Node), Node->getValueType(0), SetCC, in Expand() 1185 Mask = DAG.getSelect(DL, BitTy, Mask, DAG.getAllOnesConstant(DL, BitTy), in ExpandSELECT() 1537 return DAG.getSelect(DL, Node->getValueType(0), FullMask, Op1, Op2); in ExpandVP_MERGE() 1890 ScalarResult = DAG.getSelect(dl, EltVT, ScalarResult, in UnrollStrictFPOp() 1924 Ops[i] = DAG.getSelect(dl, EltVT, Ops[i], DAG.getAllOnesConstant(dl, EltVT), in UnrollVSETCC()
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| H A D | TargetLowering.cpp | 6506 return DAG.getSelect(dl, VT, IsOne, N0, Q); in BuildUDIV() 8166 SDValue FltOfs = DAG.getSelect(dl, SrcVT, Sel, in expandFP_TO_UINT() 8169 SDValue IntOfs = DAG.getSelect(dl, DstVT, Sel, in expandFP_TO_UINT() 8769 return DAG.getSelect(dl, VT, SrcIsZero, in expandCTLZ() 8867 return DAG.getSelect(DL, VT, SrcIsZero, in CTTZTableLookup() 8889 return DAG.getSelect(dl, VT, SrcIsZero, in expandCTTZ() 9965 return DAG.getSelect(DL, VT, Cond, Op0, Op1); in expandIntMINMAX() 9972 return DAG.getSelect(DL, VT, Cond, Op1, Op0); in expandIntMINMAX() 9976 return DAG.getSelect(DL, VT, Cond, Op0, Op1); in expandIntMINMAX() 10149 return DAG.getSelect(dl, VT, Cond, SatVal, Result); in expandShlSat() [all …]
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| H A D | LegalizeDAG.cpp | 1643 return DAG.getSelect(DL, FloatVT, Cond, NegValue, AbsValue); in ExpandFCOPYSIGN() 2737 SDValue InCvt = DAG.getSelect(dl, SrcVT, SignBitTest, Or, Op0); in ExpandLegalINT_TO_FP() 2757 return DAG.getSelect(dl, DestVT, SignBitTest, Slow, Fast); in ExpandLegalINT_TO_FP() 2783 SDValue CstOffset = DAG.getSelect(dl, Zero.getValueType(), in ExpandLegalINT_TO_FP() 4107 Results.push_back(DAG.getSelect(dl, VT, Cond, Tmp3, Tmp4)); in ExpandNode() 5136 Tmp1 = DAG.getSelect(dl, NVT, Tmp1, Tmp2, Tmp3); in PromoteNode()
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| H A D | DAGCombiner.cpp | 2509 return DAG.getSelect(SDLoc(N), VT, Cond, F0, NewBO); in foldSelectWithIdentityConstant() 2515 return DAG.getSelect(SDLoc(N), VT, Cond, NewBO, F0); in foldSelectWithIdentityConstant() 4859 Sra = DAG.getSelect(DL, VT, IsOneOrAllOnes, N0, Sra); in visitSDIVLike() 4868 SDValue Res = DAG.getSelect(DL, VT, IsNeg, Sub, Sra); in visitSDIVLike() 11544 SDValue SelectOp = DAG.getSelect(DL, VT, F, N2, N1); in visitSELECT() 12168 return DAG.getSelect(DL, VT, F, N2, N1); in visitVSELECT() 12714 return DAG.getSelect(DL, VT, N0->getOperand(0), Ext1, Ext2); in tryToFoldExtendSelectLoad() 12759 return DAG.getSelect(DL, VT, N0->getOperand(0), in tryToFoldExtendOfConstant() 13364 return DAG.getSelect(DL, VT, SetCC, ExtTrueVal, Zero); in foldSextSetcc() 17420 return DAG.getSelect(DL, VT, N0.getOperand(0), in visitSINT_TO_FP() [all …]
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| H A D | LegalizeVectorTypes.cpp | 551 return DAG.getSelect(SDLoc(N), in ScalarizeVecRes_VSELECT() 558 return DAG.getSelect(SDLoc(N), in ScalarizeVecRes_SELECT() 6000 Scalars[i] = DAG.getSelect(dl, EltVT, Scalars[i], in WidenVecRes_STRICT_FSETCC() 6776 Scalars[i] = DAG.getSelect(dl, EltVT, Scalars[i], in WidenVecOp_STRICT_FSETCC()
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| H A D | LegalizeFloatTypes.cpp | 816 return DAG.getSelect(SDLoc(N), in SoftenFloatRes_SELECT() 3033 return DAG.getSelect(SDLoc(N), Op1.getValueType(), N->getOperand(0), Op1, in SoftPromoteHalfRes_SELECT()
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| H A D | SelectionDAG.cpp | 12180 getSelect(dl, OvEltVT, Res.getValue(1), in UnrollVectorOverflowOp()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 1262 LoBitsForHi = DAG.getSelect(dl, MVT::i32, SetCC, Zero, LoBitsForHi); in LowerSHL_PARTS() 1274 DAG.getSelect(dl, MVT::i32, SetCC, HiForBigShift, HiForNormalShift); in LowerSHL_PARTS() 1279 SDValue Lo = DAG.getSelect( in LowerSHL_PARTS() 1312 Hi = DAG.getSelect(dl, MVT::i32, SetCC, Zero, Hi); in LowerSRL_PARTS() 1315 Lo = DAG.getSelect(dl, MVT::i32, SetCC, Hi, Lo); in LowerSRL_PARTS() 1319 Lo = DAG.getSelect(dl, MVT::i32, ShiftIsZero, Lo, in LowerSRL_PARTS()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | GVN.cpp | 243 static AvailableValue getSelect(SelectInst *Sel, Value *V1, Value *V2) { in getSelect() function 310 static AvailableValueInBlock getSelect(BasicBlock *BB, SelectInst *Sel, in getSelect() function 312 return get(BB, AvailableValue::getSelect(Sel, V1, V2)); in getSelect() 1298 return AvailableValue::getSelect(Sel, V1, V2); in AnalyzeLoadAvailability()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 7544 SDValue Select = DAG.getSelect(dl, ImmVT, Cond, in LowerBUILD_VECTORvXi1() 17700 return DAG.getSelect(dl, VT, Mask, LHS, RHS); in LowerVSELECT() 28147 NewX = DAG.getSelect(DL, VT, NeedSwap, Y, X); in LowerFMINIMUM_FMAXIMUM() 28148 NewY = DAG.getSelect(DL, VT, NeedSwap, X, Y); in LowerFMINIMUM_FMAXIMUM() 29296 return DAG.getSelect(dl, VT, ZAmt, R, Res); in LowerShift() 29319 Res = DAG.getSelect(dl, VT, Amt0, R, Res); in LowerShift() 29478 return DAG.getSelect(dl, SelVT, C, V0, V1); in LowerShift() 29596 return DAG.getSelect(dl, VT, C, V0, V1); in LowerShift() 30018 return DAG.getSelect(DL, SelVT, C, V0, V1); in LowerRotate() 42487 return DAG.getSelect( in signExtendBitcastSrcVector() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1101 DAG.getSelect(dl, WideTy, PredOp, in LowerVSELECT() 2967 Rs[i] = DAG.getSelect(dl, MVT::i32, Ops[i/Rep], S, Z); in LowerBUILD_VECTOR()
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| H A D | HexagonISelLoweringHVX.cpp | 1505 return DAG.getSelect(dl, ResTy, VecV, True, False); in extendHvxVectorPred() 1541 SDValue Sel = DAG.getSelect(dl, VecTy, VecQ, DAG.getBitcast(VecTy, Bytes), in compressHvxPred()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAG.h | 1235 SDValue getSelect(const SDLoc &DL, EVT VT, SDValue Cond, SDValue LHS,
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 5482 NewY = DAG.getSelect(DL, VT, XIsNonNan, Y, X); in lowerFMAXIMUM_FMINIMUM() 5488 NewX = DAG.getSelect(DL, VT, YIsNonNan, X, Y); in lowerFMAXIMUM_FMINIMUM() 6493 return DAG.getSelect(DL, VT, Cond, True, False); in LowerOperation() 7179 return DAG.getSelect(DL, VT, Sel.getOperand(0), NewT, NewF); in foldBinOpIntoSelectIfProfitable() 14573 DAG.getSelect(DL, OtherOpVT, N->getOperand(0), OtherOp, IdentityOperand); in tryFoldSelectIntoOp() 14661 return DAG.getSelect(DL, VT, in useInversedSetcc()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 10242 SDValue Lo = DAG.getSelect(DL, MVT::i32, Cond, Lo0, Lo1); in LowerSELECT() 10247 SDValue Hi = DAG.getSelect(DL, MVT::i32, Cond, Hi0, Hi1); in LowerSELECT() 11447 return DAG.getSelect(SDLoc(N), MVT::i32, RHS.getOperand(0), in performAndCombine()
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| H A D | AMDGPUISelLowering.cpp | 2434 return DAG.getSelect(SL, MVT::f64, Cond, Src, Tmp2); in LowerFROUNDEVEN()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 5625 SDValue Select = DAG.getSelect(DL, VT, Mask, Load, PassThru); in LowerMGATHER() 5803 SDValue Result = DAG.getSelect(DL, VT, Mask, Load, PassThru); in LowerMLOAD() 9252 return DAG.getSelect(DL, VT, Cond, Op0, Op1); in LowerMinMax() 22901 return DAG.getSelect(DL, ResVT, Mask, N->getOperand(1), N->getOperand(2)); in performSelectCombine() 25866 Result = DAG.getSelect(DL, ContainerVT, Mask, Result, OldPassThru); in LowerFixedLengthVectorMLoadToSVE()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 6632 Res = CurDAG->getSelect(dl, User->getValueType(0), Cond, TrueRes, FalseRes); in foldBoolExts()
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| H A D | PPCISelLowering.cpp | 8362 SDValue FltOfs = DAG.getSelect( in LowerFP_TO_INT() 8374 SDValue IntOfs = DAG.getSelect( in LowerFP_TO_INT()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 4154 DAG.getSelect(dl, VTy, HiIsZero, Lo, DAG.getNOT(dl, Lo, VTy)); in LowerINTRINSIC_WO_CHAIN() 4157 DAG.getSelect(dl, VTy, CheckLo, in LowerINTRINSIC_WO_CHAIN()
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