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Searched refs:getRegInfo (Results 1 – 25 of 386) sorted by relevance

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/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineUniformityAnalysis.cpp34 const auto &MRI = F.getRegInfo(); in markDefsDivergent()
71 const auto &RegInfo = F.getRegInfo(); in pushUsers()
104 auto *Def = F.getRegInfo().getVRegDef(Reg); in usesValueFromCycle()
115 const auto &RegInfo = F.getRegInfo(); in propagateTemporalDivergence()
140 const auto &RegInfo = F.getRegInfo(); in isDivergentUse()
159 assert(F.getRegInfo().isSSA() && "Expected to be run on SSA form!"); in computeMachineUniformityInfo()
H A DMachineInstr.cpp81 MRI = &MF->getRegInfo(); in tryToGetTargetInfo()
156 return &MBB->getParent()->getRegInfo(); in getRegInfo()
162 return &MBB->getParent()->getRegInfo(); in getRegInfo()
234 MachineRegisterInfo *MRI = getRegInfo(); in addOperand()
302 MachineRegisterInfo *MRI = getRegInfo(); in removeOperand()
2339 auto *MRI = getRegInfo(); in changeDebugValuesDefReg()
2469 Reg0, getRegInfo()->getType(Reg0), Reg1, getRegInfo()->getType(Reg1), in getFirst4RegLLTs()
2470 Reg2, getRegInfo()->getType(Reg2), Reg3, getRegInfo()->getType(Reg3)); in getFirst4RegLLTs()
2482 Reg0, getRegInfo()->getType(Reg0), Reg1, getRegInfo()->getType(Reg1), in getFirst5RegLLTs()
2483 Reg2, getRegInfo()->getType(Reg2), Reg3, getRegInfo()->getType(Reg3), in getFirst5RegLLTs()
[all …]
H A DSwiftErrorValueTracking.cpp37 auto VReg = MF->getRegInfo().createVirtualRegister(RC); in getOrCreateVReg()
59 Register VReg = MF->getRegInfo().createVirtualRegister(RC); in getOrCreateVRegDefAt()
133 Register VReg = MF->getRegInfo().createVirtualRegister(RC); in createEntriesInEntryBlock()
242 UpwardsUse ? UUseVReg : MF->getRegInfo().createVirtualRegister(RC); in propagateVRegs()
258 MachineRegisterInfo &MRI = MF->getRegInfo(); in propagateVRegs()
H A DMachineSSAContext.cpp54 return F->getRegInfo().getVRegDef(value)->getParent(); in getDefBlock()
81 auto *MRI = &F->getRegInfo(); in print()
H A DLivePhysRegs.cpp176 const MachineRegisterInfo &MRI = MF.getRegInfo(); in addCalleeSavedRegs()
251 const MachineRegisterInfo &MRI = MF.getRegInfo(); in computeLiveIns()
262 const MachineRegisterInfo &MRI = MF.getRegInfo(); in addLiveIns()
278 const MachineRegisterInfo &MRI = MF.getRegInfo(); in recomputeLivenessFlags()
H A DLiveIntervalCalc.cpp43 const MachineRegisterInfo *MRI = getRegInfo(); in calculate()
124 const MachineRegisterInfo *MRI = getRegInfo(); in createDeadDefs()
137 const MachineRegisterInfo *MRI = getRegInfo(); in extendToUses()
H A DTargetFrameLoweringImpl.cpp100 const MCPhysReg *CSRegs = MF.getRegInfo().getCalleeSavedRegs(); in determineCalleeSaves()
125 const MachineRegisterInfo &MRI = MF.getRegInfo(); in determineCalleeSaves()
H A DRegAllocPBQP.cpp456 if (!MF.getRegInfo().isAllocatable(DstReg)) in apply()
569 const MachineRegisterInfo &MRI = MF.getRegInfo(); in findVRegIntervalsToAlloc()
583 const MCPhysReg *CSR = MF.getRegInfo().getCalleeSavedRegs(); in isACalleeSavedRegister()
595 const MachineRegisterInfo &MRI = G.getMetadata().MF.getRegInfo(); in initializeGraph()
758 MachineRegisterInfo &MRI = MF.getRegInfo(); in finalizeAlloc()
770 if (!VRM.getRegInfo().isReserved(CandidateReg)) { in finalizeAlloc()
812 MF.getRegInfo().freezeReservedRegs(MF); in runOnMachineFunction()
891 const MachineRegisterInfo &MRI = G.getMetadata().MF.getRegInfo(); in PrintNodeInfo()
H A DVirtRegMap.cpp64 MRI = &mf.getRegInfo(); in runOnMachineFunction()
79 unsigned NumRegs = MF->getRegInfo().getNumVirtRegs(); in grow()
90 assert(!getRegInfo().isReserved(physReg) && in assignVirt2Phys()
131 const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(virtReg); in assignVirt2StackSlot()
260 MRI = &MF->getRegInfo(); in runOnMachineFunction()
H A DCalcSpillWeights.cpp38 MachineRegisterInfo &MRI = MF.getRegInfo(); in calculateSpillWeightsAndHints()
133 return any_of(VRM.getRegInfo().reg_operands(LI.reg()), in isLiveAtStatepointVarArg()
163 MachineRegisterInfo &MRI = MF.getRegInfo(); in weightCalcHelper()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyFixBrTableDefaults.cpp62 auto ExtMI = MF.getRegInfo().getVRegDef(MI.getOperand(0).getReg()); in fixBrTableIndex()
68 if (MF.getRegInfo().use_nodbg_empty(ExtDefReg)) { in fixBrTableIndex()
75 MF.getRegInfo().createVirtualRegister(&WebAssembly::I32RegClass); in fixBrTableIndex()
127 MachineRegisterInfo &MRI = MF.getRegInfo(); in fixBrTableDefault()
H A DWebAssemblyRegNumbering.cpp67 MachineRegisterInfo &MRI = MF.getRegInfo(); in runOnMachineFunction()
87 unsigned NumVRegs = MF.getRegInfo().getNumVirtRegs(); in runOnMachineFunction()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsMachineFunction.cpp58 MF.getRegInfo().createVirtualRegister(&getGlobalBaseRegClass(MF)); in getGlobalBaseReg()
76 MachineRegisterInfo &RegInfo = MF.getRegInfo(); in initGlobalBaseReg()
88 MF.getRegInfo().addLiveIn(Mips::T9_64); in initGlobalBaseReg()
116 MF.getRegInfo().addLiveIn(Mips::T9); in initGlobalBaseReg()
151 MF.getRegInfo().addLiveIn(Mips::V0); in initGlobalBaseReg()
H A DMipsRegisterBankInfo.cpp206 const MachineRegisterInfo &MRI = MF.getRegInfo(); in skipCopiesOutgoing()
220 const MachineRegisterInfo &MRI = MF.getRegInfo(); in skipCopiesIncoming()
233 const MachineRegisterInfo &MRI = MI->getMF()->getRegInfo(); in AmbiguousRegDefUseContainer()
367 const MachineRegisterInfo &MRI = MF.getRegInfo(); in setTypesAccordingToPhysicalRegister()
433 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getInstrMapping()
744 LegalizationArtifactCombiner ArtCombiner(Builder, MF->getRegInfo(), LegInfo); in applyMappingImpl()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCExpandPseudos.cpp65 Register AddrReg = MF.getRegInfo().createVirtualRegister(&ARC::GPR32RegClass); in expandStore()
90 Register Ra = MF.getRegInfo().createVirtualRegister(&ARC::GPR32RegClass); in expandCTLZ()
91 Register Rb = MF.getRegInfo().createVirtualRegister(&ARC::GPR32RegClass); in expandCTLZ()
118 Register R = MF.getRegInfo().createVirtualRegister(&ARC::GPR32RegClass); in expandCTTZ()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVGlobalRegistry.cpp63 auto &MRI = MIRBuilder.getMF().getRegInfo(); in createTypeVReg()
154 CurMF->getRegInfo().setRegClass(Res, &SPIRV::IDRegClass); in getOrCreateConstIntReg()
213 Res = MF.getRegInfo().createGenericVirtualRegister(LLTy); in buildConstantInt()
214 MF.getRegInfo().setRegClass(Res, &SPIRV::IDRegClass); in buildConstantInt()
257 MF.getRegInfo().setRegClass(Res, &SPIRV::IDRegClass); in buildConstantFP()
288 CurMF->getRegInfo().createGenericVirtualRegister(LLTy); in getOrCreateIntCompositeOrNull()
430 CurMF->getRegInfo().setRegClass(Res, &SPIRV::IDRegClass); in getOrCreateConstNullPtr()
1046 .addDef(createTypeVReg(CurMF->getRegInfo())) in getOrCreateSPIRVIntegerType()
1092 .addDef(createTypeVReg(CurMF->getRegInfo())) in getOrCreateSPIRVVectorType()
1111 .addDef(createTypeVReg(CurMF->getRegInfo())) in getOrCreateSPIRVArrayType()
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H A DSPIRVInstrInfo.cpp50 auto &MRI = MI.getMF()->getRegInfo(); in isTypeDeclInstr()
243 auto &MRI = I->getMF()->getRegInfo(); in copyPhysReg()
251 auto &MRI = MI.getMF()->getRegInfo(); in expandPostRAPseudo()
H A DSPIRVDuplicatesTracker.cpp25 MachineInstr *MI = MF->getRegInfo().getUniqueVRegDef(R); in prebuildReg2Entry()
48 const MachineRegisterInfo &MRI = U.first->getRegInfo(); in buildDepsGraph()
H A DSPIRVPreLegalizer.cpp42 MachineRegisterInfo &MRI = MF.getRegInfo(); in addConstantsToTrack()
100 MachineRegisterInfo &MRI = MF.getRegInfo(); in foldConstantsIntoIntrinsics()
253 MachineRegisterInfo &MRI = MF.getRegInfo(); in generateAssignInstrs()
276 MF.getRegInfo()); in generateAssignInstrs()
285 insertAssignInstr(Reg, Ty, nullptr, GR, MIB, MF.getRegInfo()); in generateAssignInstrs()
396 MachineRegisterInfo &MRI = MF.getRegInfo(); in processInstrsWithTypeFolding()
461 MachineRegisterInfo &MRI = MF.getRegInfo(); in processSwitches()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXPeephole.cpp84 const auto &MRI = MF.getRegInfo(); in isCVTAToLocalCombinationCandidate()
112 const auto &MRI = MF.getRegInfo(); in CombineCVTAToLocal()
157 const auto &MRI = MF.getRegInfo(); in runOnMachineFunction()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DGCNRegPressure.h181 reset(MBB.getParent()->getRegInfo(), in reset()
187 reset(MI.getMF()->getRegInfo(), LIS.getInstructionIndex(MI).getDeadSlot()); in reset()
278 auto &MRI = (*R.begin())->getParent()->getParent()->getRegInfo(); in getLiveRegMap()
308 MI.getParent()->getParent()->getRegInfo()); in getLiveRegsAfter()
314 MI.getParent()->getParent()->getRegInfo()); in getLiveRegsBefore()
H A DSIFrameLowering.cpp196 MF->getRegInfo().addLiveIn(GitPtrLo); in buildGitPtr()
243 MachineRegisterInfo &MRI = MF.getRegInfo(); in saveToMemory()
293 MachineRegisterInfo &MRI = MF.getRegInfo(); in restoreFromMemory()
544 MachineRegisterInfo &MRI = MF.getRegInfo(); in getEntryFunctionReservedScratchRsrcReg()
613 MachineRegisterInfo &MRI = MF.getRegInfo(); in emitEntryFunctionPrologue()
888 MachineRegisterInfo &MRI = MF.getRegInfo(); in buildScratchExecCopy()
1081 MachineRegisterInfo &MRI = MF.getRegInfo(); in emitPrologue()
1230 MachineRegisterInfo &MRI = MF.getRegInfo(); in emitEpilogue()
1335 MachineRegisterInfo &MRI = MF.getRegInfo(); in processFunctionBeforeFrameFinalized()
1451 MachineRegisterInfo &MRI = MF.getRegInfo(); in processFunctionBeforeFrameIndicesReplaced()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.cpp212 bool SaveR2 = MF->getRegInfo().isAllocatable(PPC::X2) && in getCalleeSavedRegs()
567 const MachineRegisterInfo *MRI = &MF.getRegInfo(); in getRegAllocationHints()
848 NegSizeReg = MF.getRegInfo().createVirtualRegister(G8RC); in prepareDynamicAlloca()
856 NegSizeReg = MF.getRegInfo().createVirtualRegister(G8RC); in prepareDynamicAlloca()
865 NegSizeReg = MF.getRegInfo().createVirtualRegister(GPRC); in prepareDynamicAlloca()
873 NegSizeReg = MF.getRegInfo().createVirtualRegister(GPRC); in prepareDynamicAlloca()
1404 Register VSRpReg0 = MF.getRegInfo().createVirtualRegister(RC); in lowerWACCSpilling()
1751 SRegHi = MF.getRegInfo().createVirtualRegister(RC); in eliminateFrameIndex()
1752 SReg = MF.getRegInfo().createVirtualRegister(RC); in eliminateFrameIndex()
1913 MachineRegisterInfo &MRI = MBB->getParent()->getRegInfo(); in materializeFrameBaseRegister()
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/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DMachineOutliner.h79 assert(MBB->getParent()->getRegInfo().tracksLiveness() && in initFromEndOfBlockToStartOfSeq()
96 assert(MBB->getParent()->getRegInfo().tracksLiveness() && in initInSeq()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVCallLowering.cpp408 RISCVOutgoingValueHandler Handler(MIRBuilder, MF.getRegInfo(), Ret); in lowerReturnVal()
435 MachineRegisterInfo &MRI = MF.getRegInfo(); in saveVarArgRegisters()
533 RISCVFormalArgHandler Handler(MIRBuilder, MF.getRegInfo()); in lowerFormalArguments()
595 RISCVOutgoingValueHandler ArgHandler(MIRBuilder, MF.getRegInfo(), Call); in lowerCall()
611 constrainOperandRegClass(MF, *TRI, MF.getRegInfo(), in lowerCall()
625 RISCVCallReturnHandler RetHandler(MIRBuilder, MF.getRegInfo(), Call); in lowerCall()

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