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Searched refs:getOppositeCondition (Results 1 – 12 of 12) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiInstrInfo.cpp123 static LPCC::CondCode getOppositeCondition(LPCC::CondCode CC) { in getOppositeCondition() function
376 LPCC::CondCode NewCC = getOppositeCondition(CC); in optimizeCompareInstr()
522 NewMI.addImm(getOppositeCondition(LPCC::CondCode(CondCode))); in optimizeSelect()
649 Condition[0].setImm(getOppositeCondition(BranchCond)); in reverseBranchCondition()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRInstrInfo.cpp241 AVRCC::CondCodes AVRInstrInfo::getOppositeCondition(AVRCC::CondCodes CC) const { in getOppositeCondition() function in llvm::AVRInstrInfo
350 BranchCode = getOppositeCondition(BranchCode); in analyzeBranch()
474 Cond[0].setImm(getOppositeCondition(CC)); in reverseBranchCondition()
H A DAVRInstrInfo.h73 AVRCC::CondCodes getOppositeCondition(AVRCC::CondCodes CC) const;
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/Utils/
H A DARMBaseInfo.h48 inline static CondCodes getOppositeCondition(CondCodes CC) { in getOppositeCondition() function
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DThumb2ITBlockPass.cpp225 ARMCC::CondCodes OCC = ARMCC::getOppositeCondition(CC); in InsertITInstructions()
H A DMVETPAndVPTOptimisationsPass.cpp594 ExpectedCode = ARMCC::getOppositeCondition(ExpectedCode); in IsVPNOTEquivalent()
H A DARMConstantIslandPass.cpp1761 CC = ARMCC::getOppositeCondition(CC); in fixupConditionalBr()
H A DARMBaseInstrInfo.cpp554 Cond[0].setImm(ARMCC::getOppositeCondition(CC)); in reverseBranchCondition()
2274 .setImm(ARMCC::getOppositeCondition(CC)); in commuteInstructionImpl()
2377 NewMI.addImm(ARMCC::getOppositeCondition(ARMCC::CondCodes(CondCode))); in optimizeSelect()
H A DARMISelLowering.cpp5720 CondCode = ARMCC::getOppositeCondition(CondCode); in LowerBRCOND()
5773 CondCode = ARMCC::getOppositeCondition(CondCode); in LowerBR_CC()
12319 .addImm(ARMCC::getOppositeCondition(ARMCC::MI)).addReg(ARM::CPSR); in EmitInstrWithCustomInserter()
14662 ARMCC::CondCodes CC = ARMCC::getOppositeCondition(getVCMPCondCode(N)); in CanInvertMVEVCMP()
14819 ARMCC::CondCodes CC = ARMCC::getOppositeCondition(getVCMPCondCode(N0)); in PerformXORCombine()
14998 CC = ARMCC::getOppositeCondition( in IsCMPZCSINC()
15033 DAG.getConstant(ARMCC::getOppositeCondition(Cond), SDLoc(N), MVT::i32), C); in PerformCSETCombine()
18430 Cond = ARMCC::getOppositeCondition(Cond); in PerformCMOVCombine()
H A DARMInstrFormats.td196 return CurDAG->getTargetConstant(ARMCC::getOppositeCondition(CC), SDLoc(N),
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMInstPrinter.cpp1005 O << ARMCondCodeToString(ARMCC::getOppositeCondition(CC)); in printMandatoryInvertedPredicateOperand()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp367 return MaskBit ? ARMCC::getOppositeCondition(ITState.Cond) : ITState.Cond; in currentITCond()
374 ITState.Cond = ARMCC::getOppositeCondition(ITState.Cond); in invertCurrentITCondition()
391 Cond == ARMCC::getOppositeCondition(ITState.Cond)); in extendImplicitITBlock()
2530 Inst.addOperand(MCOperand::createImm(unsigned(ARMCC::getOppositeCondition(getCondCode())))); in addITCondCodeInvOperands()
11066 } else if (InstCond == ARMCC::getOppositeCondition(ITCond)) { in MatchInstruction()