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Searched refs:getNumRegs (Results 1 – 25 of 88) sorted by relevance

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/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DLivePhysRegs.h61 LiveRegs.setUniverse(TRI.getNumRegs()); in LivePhysRegs()
71 LiveRegs.setUniverse(TRI.getNumRegs()); in init()
83 assert(Reg <= TRI->getNumRegs() && "Expected a physical register."); in addReg()
92 assert(Reg <= TRI->getNumRegs() && "Expected a physical register."); in removeReg()
H A DTargetRegisterInfo.h82 unsigned getNumRegs() const { return MC->getNumRegs(); } in getNumRegs() function
203 return OrderFunc ? OrderFunc(MF) : ArrayRef(begin(), getNumRegs()); in getRawAllocationOrder()
271 return getNumRegs(); in getNumSupportedRegs()
364 unsigned NumRegs = getNumRegs(); in getRegisterCosts()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kRegisterInfo.cpp98 (BestRC->hasSubClass(RC) && RC->getNumRegs() > BestRC->getNumRegs()))) in getMaximalPhysRegClass()
108 for (unsigned i = 0; i < TRC.getNumRegs(); ++i) { in getRegisterOrder()
125 BitVector Reserved(getNumRegs()); in getReservedRegs()
138 for (size_t Reg = 0, Total = getNumRegs(); Reg != Total; ++Reg) { in getReservedRegs()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/
H A DCriticalAntiDepBreaker.cpp45 Classes(TRI->getNumRegs(), nullptr), KillIndices(TRI->getNumRegs(), 0), in CriticalAntiDepBreaker()
46 DefIndices(TRI->getNumRegs(), 0), KeepRegs(TRI->getNumRegs(), false) {} in CriticalAntiDepBreaker()
52 for (unsigned i = 1, e = TRI->getNumRegs(); i != e; ++i) { in StartBlock()
114 for (unsigned Reg = 1; Reg != TRI->getNumRegs(); ++Reg) { in Observe()
268 for (unsigned i = 1, e = TRI->getNumRegs(); i != e; ++i) { in ScanInstruction()
466 for (unsigned Reg = 1; Reg < TRI->getNumRegs(); ++Reg) { in BreakAntiDependencies()
520 std::vector<unsigned> LastNewReg(TRI->getNumRegs(), 0); in BreakAntiDependencies()
H A DRegisterClassInfo.cpp83 CalleeSavedAliases.assign(TRI->getNumRegs(), 0); in runOnMachineFunction()
95 BitVector CSRHintsForAllocOrder(TRI->getNumRegs()); in runOnMachineFunction()
132 unsigned NumRegs = RC->getNumRegs(); in compute()
233 unsigned NReserved = RC->getNumRegs() - NAllocatableRegs; in computePSetLimit()
H A DRDFRegisters.cpp31 RegInfos.resize(TRI.getNumRegs()); in PhysicalRegisterInfo()
33 BitVector BadRC(TRI.getNumRegs()); in PhysicalRegisterInfo()
81 for (unsigned I = 1, E = TRI.getNumRegs(); I != E; ++I) { in PhysicalRegisterInfo()
92 BitVector AS(TRI.getNumRegs()); in PhysicalRegisterInfo()
111 for (unsigned i = 1, e = TRI.getNumRegs(); i != e; ++i) { in getAliasSet()
144 unsigned NumRegs = TRI.getNumRegs(); in getUnits()
256 if (0 < A.idx() && A.idx() < TRI.getNumRegs()) in print()
H A DRegUsageInfoCollector.cpp127 unsigned RegMaskSize = MachineOperand::getRegMaskSize(TRI->getNumRegs()); in runOnMachineFunction()
154 for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) { in runOnMachineFunction()
181 for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) { in runOnMachineFunction()
H A DTargetFrameLoweringImpl.cpp72 CalleeSaves.resize(TRI.getNumRegs()); in getCalleeSaves()
90 SavedRegs.resize(TRI.getNumRegs()); in determineCalleeSaves()
H A DMachineRegisterInfo.cpp46 unsigned NumRegs = getTargetRegisterInfo()->getNumRegs(); in MachineRegisterInfo()
77 if (NewRC->getNumRegs() < MinNumRegs) in constrainRegClass()
259 for (unsigned i = 1, e = getTargetRegisterInfo()->getNumRegs(); i != e; ++i) in verifyUseLists()
513 assert(ReservedRegs.size() == getTargetRegisterInfo()->getNumRegs() && in freezeReservedRegs()
605 assert(Reg && (Reg < TRI->getNumRegs()) && in disableCalleeSavedRegister()
H A DTargetRegisterInfo.cpp90 BitVector Checked(getNumRegs()); in checkAllSuperRegsMarked()
128 else if (Reg < TRI->getNumRegs()) { in printReg()
259 BitVector Allocatable(getNumRegs()); in getAllocatableSet()
495 unsigned N = (getNumRegs()+31) / 32; in regmaskSubsetEqual()
H A DExecutionDomainFix.cpp420 assert(NumRegs == RC->getNumRegs() && "Bad regclass"); in runOnMachineFunction()
444 AliasMap.resize(TRI->getNumRegs()); in runOnMachineFunction()
445 for (unsigned i = 0, e = RC->getNumRegs(); i != e; ++i) in runOnMachineFunction()
H A DAggressiveAntiDepBreaker.cpp148 State = new AggressiveAntiDepState(TRI->getNumRegs(), BB); in StartBlock()
203 for (unsigned Reg = 1; Reg != TRI->getNumRegs(); ++Reg) { in Observe()
511 BitVector BV(TRI->getNumRegs(), false); in GetRenameRegisters()
772 for (unsigned Reg = 1; Reg < TRI->getNumRegs(); ++Reg) { in BreakAntiDependencies()
779 BitVector RegAliases(TRI->getNumRegs()); in BreakAntiDependencies()
H A DRegisterUsageInfo.cpp93 for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) { in print()
H A DInterferenceCache.cpp43 if (PhysRegEntriesCount == TRI->getNumRegs()) return; in reinitPhysRegEntries()
45 PhysRegEntriesCount = TRI->getNumRegs(); in reinitPhysRegEntries()
H A DRegUsageInfoPropagate.cpp65 ->getNumRegs()) in setRegMask()
/freebsd-14.2/contrib/llvm-project/llvm/lib/MC/
H A DMCRegisterInfo.cpp48 assert(SubReg && SubReg < getNumRegs() && "This is not a register"); in getSubRegIndex()
129 report_fatal_error("unknown codeview register " + (RegNum < getNumRegs() in getCodeViewRegNum()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVRegisterInfo.cpp25 return BitVector(getNumRegs()); in getReservedRegs()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64Subtarget.cpp320 ReserveXRegister(AArch64::GPR64commonRegClass.getNumRegs()), in AArch64Subtarget()
321 ReserveXRegisterForRA(AArch64::GPR64commonRegClass.getNumRegs()), in AArch64Subtarget()
322 CustomCallSavedXRegs(AArch64::GPR64commonRegClass.getNumRegs()), in AArch64Subtarget()
H A DAArch64RegisterInfo.cpp199 for (size_t i = 0; i < AArch64::GPR64commonRegClass.getNumRegs(); ++i) { in UpdateCustomCalleeSavedRegs()
328 unsigned RegMaskSize = MachineOperand::getRegMaskSize(getNumRegs()); in UpdateCustomCallPreservedMask()
331 for (size_t i = 0; i < AArch64::GPR64commonRegClass.getNumRegs(); ++i) { in UpdateCustomCallPreservedMask()
409 BitVector Reserved(getNumRegs()); in getStrictlyReservedRegs()
428 for (size_t i = 0; i < AArch64::GPR32commonRegClass.getNumRegs(); ++i) { in getStrictlyReservedRegs()
469 for (size_t i = 0; i < AArch64::GPR32commonRegClass.getNumRegs(); ++i) { in getReservedRegs()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcSubtarget.cpp53 ReserveRegister(TM.getMCRegisterInfo()->getNumRegs()), in SparcSubtarget()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsDelaySlotFiller.cpp343 : TRI(TRI), Defs(TRI.getNumRegs(), false), Uses(TRI.getNumRegs(), false) {} in RegDefsUses()
374 BitVector CallerSavedRegs(TRI.getNumRegs(), true); in setCallerSaved()
409 BitVector NewDefs(TRI.getNumRegs()), NewUses(TRI.getNumRegs()); in update()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZRegisterInfo.cpp259 BitVector Reserved(getNumRegs()); in getReservedRegs()
410 BitVector PhysClobbered(getNumRegs()); in shouldCoalesce()
425 if (PhysClobbered.count() > (NewRC->getNumRegs() - DemandedFreeGR128)) in shouldCoalesce()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCRegisterInfo.h61 unsigned getNumRegs() const { return RegsSize; } in getNumRegs() function
66 assert(i < getNumRegs() && "Register number out of range!"); in getRegister()
404 unsigned getNumRegs() const { in getNumRegs() function
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXRegisterInfo.cpp98 BitVector Reserved(getNumRegs()); in getReservedRegs()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600RegisterInfo.cpp37 BitVector Reserved(getNumRegs()); in getReservedRegs()

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