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Searched refs:getMinVectorRegisterBitWidth (Results 1 – 17 of 17) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/DirectX/
H A DDirectXTargetTransformInfo.h36 unsigned getMinVectorRegisterBitWidth() const { return 32; } in getMinVectorRegisterBitWidth() function
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600TargetTransformInfo.h52 unsigned getMinVectorRegisterBitWidth() const;
H A DR600TargetTransformInfo.cpp44 unsigned R600TTIImpl::getMinVectorRegisterBitWidth() const { return 32; } in getMinVectorRegisterBitWidth() function in R600TTIImpl
H A DAMDGPUTargetTransformInfo.h122 unsigned getMinVectorRegisterBitWidth() const;
H A DAMDGPUTargetTransformInfo.cpp333 unsigned GCNTTIImpl::getMinVectorRegisterBitWidth() const { in getMinVectorRegisterBitWidth() function in GCNTTIImpl
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXTargetTransformInfo.h83 unsigned getMinVectorRegisterBitWidth() const { return 32; } in getMinVectorRegisterBitWidth() function
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/VE/
H A DVETargetTransformInfo.h120 unsigned getMinVectorRegisterBitWidth() const { in getMinVectorRegisterBitWidth() function
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64TargetTransformInfo.h135 unsigned getMinVectorRegisterBitWidth() const { in getMinVectorRegisterBitWidth() function
136 return ST->getMinVectorRegisterBitWidth(); in getMinVectorRegisterBitWidth()
H A DAArch64Subtarget.h231 unsigned getMinVectorRegisterBitWidth() const { in getMinVectorRegisterBitWidth() function
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonTargetTransformInfo.cpp123 return TypeSize::getFixed(getMinVectorRegisterBitWidth()); in getRegisterBitWidth()
131 unsigned HexagonTTIImpl::getMinVectorRegisterBitWidth() const { in getMinVectorRegisterBitWidth() function in HexagonTTIImpl
H A DHexagonTargetTransformInfo.h87 unsigned getMinVectorRegisterBitWidth() const;
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVTargetTransformInfo.h122 unsigned getMinVectorRegisterBitWidth() const { in getMinVectorRegisterBitWidth() function
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DTargetTransformInfo.h1115 unsigned getMinVectorRegisterBitWidth() const;
1919 virtual unsigned getMinVectorRegisterBitWidth() const = 0;
2496 unsigned getMinVectorRegisterBitWidth() const override { in getMinVectorRegisterBitWidth() function
2497 return Impl.getMinVectorRegisterBitWidth(); in getMinVectorRegisterBitWidth()
H A DTargetTransformInfoImpl.h465 unsigned getMinVectorRegisterBitWidth() const { return 128; } in getMinVectorRegisterBitWidth() function
/freebsd-14.2/contrib/llvm-project/llvm/lib/Analysis/
H A DTargetTransformInfo.cpp717 unsigned TargetTransformInfo::getMinVectorRegisterBitWidth() const { in getMinVectorRegisterBitWidth() function in TargetTransformInfo
718 return TTIImpl->getMinVectorRegisterBitWidth(); in getMinVectorRegisterBitWidth()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DVectorCombine.cpp148 unsigned MinVectorSize = TTI.getMinVectorRegisterBitWidth(); in canWidenLoad()
176 unsigned MinVectorSize = TTI.getMinVectorRegisterBitWidth(); in vectorizeLoadInsert()
H A DSLPVectorizer.cpp1001 MinVecRegSize = TTI->getMinVectorRegisterBitWidth(); in BoUpSLP()