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Searched refs:getLocVT (Results 1 – 25 of 34) sorted by relevance

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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVCallLowering.cpp103 if (VA.getLocVT() == MVT::i64 && VA.getValVT() == MVT::f32) in assignValueToReg()
122 assert(VALo.getLocVT() == MVT::i32 && VAHi.getLocVT() == MVT::i32 && in assignCustomValue()
131 LLT MemTy(VAHi.getLocVT()); in assignCustomValue()
245 assert(VALo.getLocVT() == MVT::i32 && VAHi.getLocVT() == MVT::i32 && in assignCustomValue()
253 LLT MemTy(VAHi.getLocVT()); in assignCustomValue()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp288 assert(VA.getLocVT() == MVT::v2i32); in LowerReturn_32()
466 assert(VA.getLocVT() == MVT::f64 || VA.getLocVT() == MVT::v2i32); in LowerFormalArguments_32()
499 if (VA.getLocVT() == MVT::f32) in LowerFormalArguments_32()
501 else if (VA.getLocVT() != MVT::i32) { in LowerFormalArguments_32()
949 assert(VA.getLocVT() == MVT::f64 || VA.getLocVT() == MVT::v2i32); in LowerCall_32()
964 if (VA.getLocVT() == MVT::f64) { in LowerCall_32()
1015 if (VA.getLocVT() != MVT::f32) { in LowerCall_32()
1116 if (RVLocs[i].getLocVT() == MVT::v2i32) { in LowerCall_32()
1184 MVT ValTy = VA.getLocVT(); in fixupVariableFloatArgs()
1296 || VA.getLocVT() != MVT::i128) in LowerCall_64()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLoweringCall.cpp782 ValToCopy = DAG.getBitcast(VA.getLocVT(), ValToCopy); in LowerReturn()
1110 EVT CopyVT = VA.getLocVT(); in LowerCallResult()
1145 RoundAfterCopy = (CopyVT != VA.getLocVT()); in LowerCallResult()
1169 ((VA.getLocVT() == MVT::i64) || (VA.getLocVT() == MVT::i32) || in LowerCallResult()
1170 (VA.getLocVT() == MVT::i16) || (VA.getLocVT() == MVT::i8))) { in LowerCallResult()
1313 ValVT = VA.getLocVT(); in LowerMemArgument()
1717 EVT RegVT = VA.getLocVT(); in LowerFormalArguments()
1790 ((VA.getLocVT() == MVT::i64) || (VA.getLocVT() == MVT::i32) || in LowerFormalArguments()
1791 (VA.getLocVT() == MVT::i16) || (VA.getLocVT() == MVT::i8))) { in LowerFormalArguments()
2149 EVT RegVT = VA.getLocVT(); in LowerCall()
[all …]
H A DX86FastISel.cpp3364 assert(VA.getLocVT().isInteger() && !VA.getLocVT().isVector() && in fastLowerCall()
3373 ArgVT = VA.getLocVT(); in fastLowerCall()
3377 assert(VA.getLocVT().isInteger() && !VA.getLocVT().isVector() && in fastLowerCall()
3393 ArgVT = VA.getLocVT(); in fastLowerCall()
3397 assert(VA.getLocVT().isInteger() && !VA.getLocVT().isVector() && in fastLowerCall()
3399 bool Emitted = X86FastEmitExtend(ISD::ANY_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
3402 Emitted = X86FastEmitExtend(ISD::ZERO_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
3405 Emitted = X86FastEmitExtend(ISD::SIGN_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
3409 ArgVT = VA.getLocVT(); in fastLowerCall()
3413 ArgReg = fastEmit_r(ArgVT, VA.getLocVT(), ISD::BITCAST, ArgReg); in fastLowerCall()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCISelLowering.cpp312 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
315 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
318 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
523 EVT RegVT = VA.getLocVT(); in LowerCallArguments()
540 unsigned ObjSize = VA.getLocVT().getStoreSize(); in LowerCallArguments()
549 ArgIn = DAG.getLoad(VA.getLocVT(), dl, Chain, FIN, in LowerCallArguments()
680 unsigned ObjSize = VA.getLocVT().getStoreSize(); in LowerReturn()
708 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYISelLowering.cpp201 EVT LocVT = VA.getLocVT(); in convertValVTToLocVT()
234 EVT LocVT = VA.getLocVT(); in unpackFromRegLoc()
265 EVT LocVT = VA.getLocVT(); in unpackFromMemLoc()
290 assert(VA.getLocVT() == MVT::i32 && in unpack64()
355 bool IsF64OnCSKY = VA.getLocVT() == MVT::i32 && VA.getValVT() == MVT::f64; in LowerFormalArguments()
458 bool IsF64OnCSKY = VA.getLocVT() == MVT::i32 && VA.getValVT() == MVT::f64; in LowerReturn()
485 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
576 bool IsF64OnCSKY = VA.getLocVT() == MVT::i32 && VA.getValVT() == MVT::f64; in LowerCall()
726 DAG.getCopyFromReg(Chain, DL, VA.getLocReg(), VA.getLocVT(), Glue); in LowerCall()
731 bool IsF64OnCSKY = VA.getLocVT() == MVT::i32 && VA.getValVT() == MVT::f64; in LowerCall()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp350 EVT RegVT = VA.getLocVT(); in LowerFormalArguments()
389 InVals.push_back(DAG.getConstant(0, DL, VA.getLocVT())); in LowerFormalArguments()
464 Arg = DAG.getNode(ISD::SIGN_EXTEND, CLI.DL, VA.getLocVT(), Arg); in LowerCall()
467 Arg = DAG.getNode(ISD::ZERO_EXTEND, CLI.DL, VA.getLocVT(), Arg); in LowerCall()
470 Arg = DAG.getNode(ISD::ANY_EXTEND, CLI.DL, VA.getLocVT(), Arg); in LowerCall()
570 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsCallLowering.cpp173 assert(VALo.getLocVT() == MVT::i32 && VAHi.getLocVT() == MVT::i32 && in assignCustomValue()
265 assert(VALo.getLocVT() == MVT::i32 && VAHi.getLocVT() == MVT::i32 && in assignCustomValue()
H A DMipsISelLowering.cpp3279 MVT ValVT = VA.getValVT(), LocVT = VA.getLocVT(); in LowerCall()
3354 unsigned LocSizeInBits = VA.getLocVT().getSizeInBits(); in LowerCall()
3356 ISD::SHL, DL, VA.getLocVT(), Arg, in LowerCall()
3531 unsigned LocSizeInBits = VA.getLocVT().getSizeInBits(); in LowerCallResult()
3535 Shift, DL, VA.getLocVT(), Val, in LowerCallResult()
3574 MVT LocVT = VA.getLocVT(); in UnpackFromArgumentSlot()
3585 unsigned LocSizeInBits = VA.getLocVT().getSizeInBits(); in UnpackFromArgumentSlot()
3589 Opcode, DL, VA.getLocVT(), Val, in UnpackFromArgumentSlot()
3690 MVT RegVT = VA.getLocVT(); in LowerFormalArguments()
3723 MVT LocVT = VA.getLocVT(); in LowerFormalArguments()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEISelLowering.cpp411 assert(VA.getLocVT() == MVT::i64); in LowerReturn()
478 Arg = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), Arg, in LowerFormalArguments()
482 Arg = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Arg, in LowerFormalArguments()
491 assert(VA.getLocVT() == MVT::i64); in LowerFormalArguments()
697 Arg = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), Arg); in LowerCall()
700 Arg = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), Arg); in LowerCall()
703 Arg = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), Arg); in LowerCall()
711 assert(VA.getLocVT() == MVT::i64); in LowerCall()
825 RV = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), RV, in LowerCall()
829 RV = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), RV, in LowerCall()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp458 EVT RegVT = VA.getLocVT(); in LowerCCCArguments()
490 unsigned ObjSize = VA.getLocVT().getSizeInBits() / 8; in LowerCCCArguments()
494 << VA.getLocVT() << "\n"; in LowerCCCArguments()
503 VA.getLocVT(), DL, Chain, FIN, in LowerCCCArguments()
568 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
674 Arg = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), Arg); in LowerCCCCallTo()
677 Arg = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), Arg); in LowerCCCCallTo()
680 Arg = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), Arg); in LowerCCCCallTo()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp643 EVT RegVT = VA.getLocVT(); in LowerCCCArguments()
681 MVT PtrVT = VA.getLocVT(); in LowerCCCArguments()
687 unsigned ObjSize = VA.getLocVT().getSizeInBits()/8; in LowerCCCArguments()
690 << VA.getLocVT() << "\n"; in LowerCCCArguments()
699 VA.getLocVT(), dl, Chain, FIN, in LowerCCCArguments()
771 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
838 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
841 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
844 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp1059 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
1062 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
1065 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
1209 EVT RegVT = VA.getLocVT(); in LowerCCCArguments()
1229 unsigned ObjSize = VA.getLocVT().getSizeInBits()/8; in LowerCCCArguments()
1232 << VA.getLocVT() << "\n"; in LowerCCCArguments()
1242 ArgIn = DAG.getLoad(VA.getLocVT(), dl, Chain, FIN, in LowerCCCArguments()
1382 unsigned ObjSize = VA.getLocVT().getSizeInBits() / 8; in LowerReturn()
1410 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMCallLowering.cpp118 assert(VA.getLocVT().getSizeInBits() <= 64 && "Unsupported location size"); in assignValueToReg()
291 uint64_t LocSize = VA.getLocVT().getFixedSizeInBits(); in assignValueToReg()
H A DARMCallingConv.cpp178 assert(PendingMembers[0].getLocVT() == LocVT); in CC_ARM_AAPCS_Custom_Aggregate()
H A DARMFastISel.cpp1903 if (VA.getLocVT() != MVT::f64 || in ProcessCallArgs()
1953 MVT DestVT = VA.getLocVT(); in ProcessCallArgs()
1962 MVT DestVT = VA.getLocVT(); in ProcessCallArgs()
1969 unsigned BC = fastEmit_r(ArgVT, VA.getLocVT(), ISD::BITCAST, Arg); in ProcessCallArgs()
1972 ArgVT = VA.getLocVT(); in ProcessCallArgs()
1985 assert(VA.getLocVT() == MVT::f64 && in ProcessCallArgs()
H A DARMISelLowering.cpp2221 (VA.getLocVT() == MVT::f64 || VA.getLocVT() == MVT::v2f64)) { in LowerCallResult()
2236 if (VA.getLocVT() == MVT::v2f64) { in LowerCallResult()
2294 int Size = VA.getLocVT().getFixedSizeInBits() / 8; in computeAddrForCallArg()
2528 auto LocBits = VA.getLocVT().getSizeInBits(); in LowerCall()
2539 if (VA.needsCustom() && VA.getLocVT() == MVT::v2f64) { in LowerCall()
2566 assert(VA.getLocVT() == MVT::i32 && in LowerCall()
3097 EVT RegVT = VA.getLocVT(); in IsEligibleForTailCallOptimization()
3260 auto LocBits = VA.getLocVT().getSizeInBits(); in LowerReturn()
3271 (VA.getLocVT() == MVT::v2f64 || VA.getLocVT() == MVT::f64)) { in LowerReturn()
3272 if (VA.getLocVT() == MVT::v2f64) { in LowerReturn()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp369 if (VA.getLocVT().getSizeInBits() > Arg.getValueType().getSizeInBits()) { in MatchingStackOffset()
443 ValVT = VA.getLocVT(); in LowerMemArgument()
646 EVT RegVT = VA.getLocVT(); in LowerCall()
735 uint32_t OpSize = (VA.getLocVT().getSizeInBits() + 7) / 8; in LowerCall()
897 EVT CopyVT = VA.getLocVT(); in LowerCallResult()
946 EVT RegVT = VA.getLocVT(); in LowerFormalArguments()
1099 ValToCopy = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), ValToCopy); in LowerReturn()
1101 ValToCopy = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), ValToCopy); in LowerReturn()
1106 ValToCopy = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), ValToCopy); in LowerReturn()
1108 ValToCopy = DAG.getBitcast(VA.getLocVT(), ValToCopy); in LowerReturn()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp234 Val = DAG.getBitcast(VA.getLocVT(), Val); in LowerReturn()
237 Val = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Val); in LowerReturn()
240 Val = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Val); in LowerReturn()
243 Val = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Val); in LowerReturn()
251 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
483 Arg = DAG.getBitcast(VA.getLocVT(), Arg); in LowerCall()
486 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
489 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
492 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
838 MVT RegVT = VA.getLocVT(); in LowerFormalArguments()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCallLowering.cpp736 const MVT LocVT = VA.getLocVT(); in handleAssignments()
1180 LLT LocTy{VA.getLocVT()}; in extendRegister()
1270 const MVT LocVT = VA.getLocVT(); in assignValueToReg()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64CallLowering.cpp75 : LLT(VA.getLocVT()); in getStackValueStoreTypeHack()
172 LLT LocTy(VA.getLocVT()); in assignValueToAddress()
314 MVT LocVT = VA.getLocVT(); in assignValueToAddress()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DCallingConvLower.h132 MVT getLocVT() const { return LocVT; } in getLocVT() function
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUCallLowering.cpp36 if (VA.getLocVT().getSizeInBits() < 32) { in extendRegisterMin32()
124 if (VA.getLocVT().getSizeInBits() < 32) { in assignValueToReg()
132 buildExtensionHint(VA, Copy.getReg(0), LLT(VA.getLocVT())); in assignValueToReg()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp1459 Value = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), Value, in convertLocVTToValVT()
1470 assert(VA.getLocVT() == MVT::i64); in convertLocVTToValVT()
1492 assert(VA.getLocVT() == MVT::i64 || VA.getLocVT() == MVT::i128); in convertValVTToLocVT()
1497 if (VA.getValVT() == MVT::f32 && VA.getLocVT() == MVT::i64) in convertValVTToLocVT()
1501 : VA.getLocVT(); in convertValVTToLocVT()
1600 EVT LocVT = VA.getLocVT(); in LowerFormalArguments()
1660 if (VA.getLocVT() == MVT::i32 || VA.getLocVT() == MVT::f32) in LowerFormalArguments()
1956 if (VA.getLocVT() == MVT::i128) in LowerCall()
1970 if (VA.getLocVT() == MVT::i32 || VA.getLocVT() == MVT::f32) in LowerCall()
2081 VA.getLocVT(), Glue); in LowerCall()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp3506 VA1.getLocVT(), CCValAssign::Full)); in CC_LoongArchAssign2GRLen()
3514 VA1.getLocVT(), CCValAssign::Full)); in CC_LoongArchAssign2GRLen()
3738 if (VA.getLocVT() == MVT::i64 && VA.getValVT() == MVT::f32) in convertLocVTToValVT()
3752 EVT LocVT = VA.getLocVT(); in unpackFromRegLoc()
3785 ExtType, DL, VA.getLocVT(), Chain, FIN, in unpackFromMemLoc()
3791 EVT LocVT = VA.getLocVT(); in convertValVTToLocVT()
3799 if (VA.getLocVT() == MVT::i64 && VA.getValVT() == MVT::f32) in convertValVTToLocVT()
4309 DAG.getCopyFromReg(Chain, DL, VA.getLocReg(), VA.getLocVT(), Glue); in LowerCall()
4369 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()

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