| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCCallingConv.cpp | 38 unsigned FirstUnallocGPR = State.getFirstUnallocated(ELF64ArgGPRs); in CC_PPC64_ELF_Shadow_GPR_Regs() 78 unsigned RegNum = State.getFirstUnallocated(ArgRegs); in CC_PPC32_SVR4_Custom_AlignArgRegs() 103 unsigned RegNum = State.getFirstUnallocated(ArgRegs); in CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128() 129 unsigned RegNum = State.getFirstUnallocated(ArgRegs); in CC_PPC32_SVR4_Custom_AlignFPArgRegs()
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| H A D | PPCISelLowering.cpp | 4304 FuncInfo->setVarArgsNumGPR(CCInfo.getFirstUnallocated(GPArgRegs)); in LowerFormalArguments_32SVR4() 4305 FuncInfo->setVarArgsNumFPR(CCInfo.getFirstUnallocated(FPArgRegs)); in LowerFormalArguments_32SVR4() 6879 unsigned NextRegIndex = State.getFirstUnallocated(GPRs); in CC_AIX() 6889 NextRegIndex = State.getFirstUnallocated(GPRs); in CC_AIX()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | CallingConvLower.h | 315 unsigned getFirstUnallocated(ArrayRef<MCPhysReg> Regs) const { in getFirstUnallocated() function 350 unsigned FirstUnalloc = getFirstUnallocated(Regs); in AllocateReg() 391 unsigned FirstUnalloc = getFirstUnallocated(Regs); in AllocateReg()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMCallingConv.cpp | 201 unsigned RegIdx = State.getFirstUnallocated(RegList); in CC_ARM_AAPCS_Custom_Aggregate() 247 unsigned RegIdx = State.getFirstUnallocated(RegList); in CC_ARM_AAPCS_Custom_Aggregate()
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| H A D | ARMISelLowering.cpp | 4391 unsigned RBeginIdx = CCInfo.getFirstUnallocated(GPRArgRegs); in StoreByValRegs() 4525 unsigned RegIdx = CCInfo.getFirstUnallocated(GPRArgRegs); in LowerFormalArguments()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86CallingConv.cpp | 278 unsigned FirstFree = State.getFirstUnallocated(RegList); in CC_X86_32_MCUInReg()
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| H A D | X86ISelLoweringCall.cpp | 1520 unsigned NumIntRegs = CCInfo.getFirstUnallocated(ArgGPRs); in createVarArgAreaAndStoreRegisters() 1521 unsigned NumXMMRegs = CCInfo.getFirstUnallocated(ArgXMMs); in createVarArgAreaAndStoreRegisters() 2287 unsigned NumXMMRegs = CCInfo.getFirstUnallocated(XMMArgRegs); in LowerCall()
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| H A D | X86FastISel.cpp | 3494 unsigned NumXMMRegs = CCInfo.getFirstUnallocated(XMMArgRegs); in fastLowerCall()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86CallLowering.cpp | 79 NumXMMRegs = State.getFirstUnallocated(XMMArgRegs); in assignArg()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 561 unsigned FirstVariadicGPR = CCInfo.getFirstUnallocated(GPRArgRegs); in saveVarArgRegisters() 601 unsigned FirstVariadicFPR = CCInfo.getFirstUnallocated(FPRArgRegs); in saveVarArgRegisters()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 410 unsigned Idx = CCInfo.getFirstUnallocated(ArgRegs); in lowerFormalArguments()
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| H A D | MipsISelLowering.cpp | 2921 State.getFirstUnallocated(F32Regs) != ValNo; in CC_MipsO32() 4503 unsigned Idx = State.getFirstUnallocated(ArgRegs); in writeVarArgRegs() 4569 FirstReg = State->getFirstUnallocated(IntArgRegs); in HandleByVal()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
| H A D | RISCVCallLowering.cpp | 436 unsigned Idx = CCInfo.getFirstUnallocated(ArgRegs); in saveVarArgRegisters()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCISelLowering.cpp | 562 unsigned FirstVAReg = CCInfo.getFirstUnallocated(ArgRegs); in LowerCallArguments()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYISelLowering.cpp | 372 unsigned Idx = CCInfo.getFirstUnallocated(ArgRegs); in LowerFormalArguments()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 3569 if (State.getFirstUnallocated(ArgFPR32s) == std::size(ArgFPR32s)) in CC_LoongArch() 3592 unsigned RegIdx = State.getFirstUnallocated(ArgGPRs); in CC_LoongArch() 3917 unsigned Idx = CCInfo.getFirstUnallocated(ArgRegs); in LowerFormalArguments()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 1256 unsigned FirstVAReg = CCInfo.getFirstUnallocated(ArgRegs); in LowerCCCArguments()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 587 unsigned NumAllocated = CCInfo.getFirstUnallocated(ArgRegs); in LowerFormalArguments_32()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 148 unsigned RegNum = State.getFirstUnallocated(ArgRegs); in CC_SkipOdd()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 17475 if (State.getFirstUnallocated(ArgFPR32s) == std::size(ArgFPR32s)) { in CC_RISCV() 17509 unsigned RegIdx = State.getFirstUnallocated(ArgGPRs); in CC_RISCV() 18181 unsigned Idx = CCInfo.getFirstUnallocated(ArgRegs); in LowerFormalArguments()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 2235 unsigned RegIdx = CCInfo.getFirstUnallocated(ArgVGPRs); in allocateVGPR32Input() 2257 unsigned RegIdx = CCInfo.getFirstUnallocated(ArgSGPRs); in allocateSGPR32InputImpl()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 7057 unsigned FirstVariadicGPR = CCInfo.getFirstUnallocated(GPRArgRegs); in saveVarArgRegisters() 7103 unsigned FirstVariadicFPR = CCInfo.getFirstUnallocated(FPRArgRegs); in saveVarArgRegisters()
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