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Searched refs:getExtType (Results 1 – 4 of 4) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/utils/TableGen/
H A DCodeGenDAGPatterns.cpp1937 getExtType(i).writeToStream(OS); in print()
2134 R->setType(i, getExtType(i)); in InlinePatternFragments()
3059 !N->getExtType(0).empty() && in SimplifyTree()
3060 N->getExtType(0) == N->getChild(0)->getExtType(0) && in SimplifyTree()
3447 Slot->UpdateNodeType(0, Pat->getExtType(0), I); in HandleUse()
3448 Pat->UpdateNodeType(0, Slot->getExtType(0), I); in HandleUse()
3805 Pat->getExtType(k).writeToStream(OS); in parseInstructionPattern()
4226 if (N->getExtType(i).empty() || TI.isConcrete(N->getExtType(i), false)) in ForceArbitraryInstResultType()
4230 if (TI.forceArbitrary(N->getExtType(i))) in ForceArbitraryInstResultType()
4293 i, T->getExtType(i), Result); in ParseOnePattern()
[all …]
H A DGlobalISelEmitter.cpp1386 inferSuperRegisterClassForNode(Dst->getExtType(0), Dst->getChild(0), in createAndImportSubInstructionRenderer()
1437 inferSuperRegisterClass(Dst->getExtType(0), Dst->getChild(2)); in createAndImportSubInstructionRenderer()
1520 const TypeSetByHwMode &ExtTy = Dst->getExtType(I); in importExplicitDefRenderers()
1814 const TypeSetByHwMode &VTy = Child0->getExtType(0); in inferRegClassFromPattern()
1819 const TypeSetByHwMode &VTy = N->getExtType(0); in inferRegClassFromPattern()
2020 const TypeSetByHwMode &VTy = Src->getExtType(I); in runOnPattern()
2146 Src->getExtType(0), Dst->getChild(0), Dst->getChild(2)); in runOnPattern()
2167 inferSuperRegisterClass(Src->getExtType(0), Dst->getChild(2)); in runOnPattern()
H A DDAGISelMatcherGen.cpp505 if (NodeNoTypes->getExtType(i) == N->getExtType(i)) continue; in EmitMatchCode()
506 NodeNoTypes->setType(i, N->getExtType(i)); in EmitMatchCode()
H A DCodeGenDAGPatterns.h699 const TypeSetByHwMode &getExtType(unsigned ResNo) const { in getExtType() function
702 TypeSetByHwMode &getExtType(unsigned ResNo) { return Types[ResNo]; } in getExtType() function