Searched refs:getDstReg (Results 1 – 12 of 12) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | RegisterCoalescer.cpp | 1911 if (!MRI->isReserved(CP.getDstReg())) { in canJoinPhys() 1982 auto DstRC = MRI->getRegClass(CP.getDstReg()); in joinCopy() 2020 if (CP.getSrcReg() == CP.getDstReg()) { in joinCopy() 2157 InflateRegs.push_back(CP.getDstReg()); in joinCopy() 2169 updateRegDefsUses(CP.getDstReg(), CP.getDstReg(), CP.getDstIdx()); in joinCopy() 2209 dbgs() << printReg(CP.getDstReg(), TRI); in joinCopy() 2211 dbgs() << LIS->getInterval(CP.getDstReg()); in joinCopy() 2220 Register DstReg = CP.getDstReg(); in joinReservedPhysReg() 3731 PHIIt->second.Reg = CP.getDstReg(); in joinVirtRegs() 3747 RegIt = RegToPHIIdx.find(CP.getDstReg()); in joinVirtRegs() [all …]
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| H A D | RegisterCoalescer.h | 97 Register getDstReg() const { return DstReg; } in getDstReg() function
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| H A D | PrologEpilogInserter.cpp | 599 MCPhysReg DstReg = I.getDstReg(); in updateLiveness() 623 TII.get(TargetOpcode::COPY), CS.getDstReg()) in insertCSRSaves() 651 .addReg(CI.getDstReg(), getKillRegState(true)); in insertCSRRestores()
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| H A D | RegAllocPBQP.cpp | 447 if (!CP.setRegisters(&MI) || CP.getSrcReg() == CP.getDstReg()) in apply() 450 Register DstReg = CP.getDstReg(); in apply()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | GenericMachineInstrs.h | 92 Register getDstReg() const { return getOperand(0).getReg(); } in getDstReg() function 172 Register getDstReg() const { return getOperand(0).getReg(); } in getDstReg() function 358 Register getDstReg() const { return getReg(0); } in getDstReg() function
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | MachineFrameInfo.h | 63 unsigned getDstReg() const { return DstReg; } in getDstReg() function
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCFrameLowering.cpp | 1209 unsigned SpilledReg = I.getDstReg(); in emitPrologue() 2421 VSRContainingGPRs.FindAndConstruct(Info.getDstReg()).second; in spillCalleeSavedRegisters() 2479 unsigned Dst = I.getDstReg(); in spillCalleeSavedRegisters() 2652 unsigned Dst = CSI[i].getDstReg(); in restoreCalleeSavedRegisters()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerCombiner.cpp | 690 LoadValsSinceLastStore.push_back(Ld->getDstReg()); in optimizeConsecutiveMemOpAddressing()
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| H A D | AArch64InstructionSelector.cpp | 4771 auto OpAndCC = emitOverflowOp(I.getOpcode(), CarryMI.getDstReg(), in selectOverflowOp() 5614 Register Dst = ExtLd.getDstReg(); in selectIndexedExtLoad() 5701 Register Dst = Ld.getDstReg(); in selectIndexedLoad()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 560 Register LoadReg = LoadMI->getDstReg(); in matchCombineExtendingLoads() 760 if (!LoadMI || !MRI.hasOneNonDBGUse(LoadMI->getDstReg())) in matchCombineLoadWithAndMask() 763 Register LoadReg = LoadMI->getDstReg(); in matchCombineLoadWithAndMask() 915 {MRI.getType(LoadDef->getDstReg()), in matchSextInRegOfLoad() 920 MatchInfo = std::make_tuple(LoadDef->getDstReg(), NewSizeBits); in matchSextInRegOfLoad()
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| H A D | LegalizerHelper.cpp | 1315 Register DstReg = LoadMI.getDstReg(); in narrowScalar() 1333 Register DstReg = LoadMI.getDstReg(); in narrowScalar() 3299 Register DstReg = LoadMI.getDstReg(); in lowerLoad()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 139 unsigned getDstReg() const { return Dst; } in getDstReg() function in __anonc2b64ba80111::AArch64AsmParser::PrefixInfo 5218 if (Inst.getOperand(0).getReg() != Prefix.getDstReg()) in validateInstruction() 5226 isMatchingOrAlias(Prefix.getDstReg(), Inst.getOperand(i).getReg())) in validateInstruction()
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