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Searched refs:getBaseRegister (Results 1 – 25 of 25) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kRegisterInfo.cpp154 if (MachineOperand::clobbersPhysReg(RegMask, getBaseRegister())) in getReservedRegs()
159 setBitVector(getBaseRegister()); in getReservedRegs()
185 BasePtr = (FIndex < 0 ? FramePtr : getBaseRegister()); in eliminateFrameIndex()
H A DM68kRegisterInfo.h109 unsigned getBaseRegister() const { return BasePtr; } in getBaseRegister() function
H A DM68kFrameLowering.cpp84 FrameReg = TRI->getBaseRegister(); in getFrameIndexReference()
490 unsigned BasePtr = TRI->getBaseRegister(); in emitPrologue()
800 SavedRegs.set(TRI->getBaseRegister()); in determineCalleeSaves()
H A DM68kCollapseMOVEMPass.cpp223 Reg == TRI->getBaseRegister() || in ProcessMI()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiRegisterInfo.cpp60 Reserved.set(getBaseRegister()); in getReservedRegs()
156 FrameReg = getBaseRegister(); in eliminateFrameIndex()
263 Register LanaiRegisterInfo::getBaseRegister() const { return Lanai::R14; } in getBaseRegister() function in LanaiRegisterInfo
H A DLanaiRegisterInfo.h44 Register getBaseRegister() const;
H A DLanaiFrameLowering.cpp214 SavedRegs.reset(LRI->getBaseRegister()); in determineCalleeSaves()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86RegisterInfo.h166 Register getBaseRegister() const { return BasePtr; } in getBaseRegister() function
H A DX86ArgumentStackSlotRebase.cpp125 Register BasePtr = TRI->getBaseRegister(); in runOnMachineFunction()
H A DX86SelectionDAGInfo.cpp44 return llvm::is_contained(ClobberSet, TRI->getBaseRegister()); in isBaseRegConflictPossible()
H A DX86RegisterInfo.cpp566 if (MachineOperand::clobbersPhysReg(RegMask, getBaseRegister())) in getReservedRegs()
571 Register BasePtr = getX86SubSuperRegister(getBaseRegister(), 64); in getReservedRegs()
H A DX86FrameLowering.cpp1536 Register BasePtr = TRI->getBaseRegister(); in emitPrologue()
2554 FrameReg = IsFixed ? TRI->getFramePtr() : TRI->getBaseRegister(); in getFrameIndexReference()
2951 Register BaseReg = this->TRI->getBaseRegister(); in spillCalleeSavedRegisters()
3058 Register BaseReg = this->TRI->getBaseRegister(); in restoreCalleeSavedRegisters()
3090 Register BasePtr = TRI->getBaseRegister(); in determineCalleeSaves()
3850 Register BasePtr = TRI->getBaseRegister(); in restoreWin32EHStackPointers()
H A DX86ISelLowering.cpp26179 Reg = RegInfo->getBaseRegister(); in LowerINTRINSIC_WO_CHAIN()
35391 Register BasePtr = RegInfo->getBaseRegister(); in emitEHSjLjSetJmp()
35821 Register BP = RI.getBaseRegister(); in EmitSjLjDispatchBlock()
36212 assert(TRI->getBaseRegister() == X86::ESI && in EmitInstrWithCustomInserter()
36247 Register BasePtr = TRI->getBaseRegister(); in EmitInstrWithCustomInserter()
36278 Register BasePtr = TRI->getBaseRegister(); in EmitInstrWithCustomInserter()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64RegisterInfo.h126 unsigned getBaseRegister() const;
H A DAArch64RegisterInfo.cpp530 unsigned AArch64RegisterInfo::getBaseRegister() const { return AArch64::X19; } in getBaseRegister() function in AArch64RegisterInfo
1013 return getBaseRegister(); in getLocalAddressRegister()
H A DAArch64FrameLowering.cpp2092 TII->copyPhysReg(MBB, MBBI, DL, RegInfo->getBaseRegister(), AArch64::SP, in emitPrologue()
2651 FrameReg = RegInfo->hasBasePointer(MF) ? RegInfo->getBaseRegister() in resolveFrameOffsetReference()
2669 FrameReg = RegInfo->getBaseRegister(); in resolveFrameOffsetReference()
3246 ? RegInfo->getBaseRegister() in determineCalleeSaves()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMBaseRegisterInfo.h206 Register getBaseRegister() const { return BasePtr; } in getBaseRegister() function
H A DARMFrameLowering.cpp1255 BuildMI(MBB, MBBI, dl, TII.get(ARM::MOVr), RegInfo->getBaseRegister()) in emitPrologue()
1260 BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), RegInfo->getBaseRegister()) in emitPrologue()
1467 FrameReg = RegInfo->getBaseRegister(); in ResolveFrameIndexReference()
1515 FrameReg = RegInfo->getBaseRegister(); in ResolveFrameIndexReference()
2329 SavedRegs.set(RegInfo->getBaseRegister()); in determineCalleeSaves()
H A DThumb1FrameLowering.cpp170 Register BasePtr = RegInfo->getBaseRegister(); in emitPrologue()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.h172 Register getBaseRegister(const MachineFunction &MF) const;
H A DPPCFrameLowering.cpp392 unsigned BPReg = HasBP ? (unsigned) RegInfo->getBaseRegister(MF) : FPReg; in replaceFPWithRealFP()
650 Register BPReg = RegInfo->getBaseRegister(MF); in emitPrologue()
1263 Register BPReg = RegInfo->getBaseRegister(MF); in inlineStackProbe()
1577 Register BPReg = RegInfo->getBaseRegister(MF); in emitEpilogue()
2032 SavedRegs.reset(RegInfo->getBaseRegister(MF)); in determineCalleeSaves()
2197 Register BP = RegInfo->getBaseRegister(MF); in processFunctionBeforeFrameFinalized()
H A DPPCRegisterInfo.cpp1672 FrameIndex < 0 ? getBaseRegister(MF) : getFrameRegister(MF), false); in eliminateFrameIndex()
1824 Register PPCRegisterInfo::getBaseRegister(const MachineFunction &MF) const { in getBaseRegister() function in PPCRegisterInfo
1894 return !isFrameOffsetLegal(MI, getBaseRegister(MF), Offset); in needsFrameBaseReg()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIRegisterInfo.h113 Register getBaseRegister() const;
H A DSIFrameLowering.cpp1086 TRI.hasBasePointer(MF) ? TRI.getBaseRegister() : Register(); in emitPrologue()
1545 Register BasePtrReg = TRI->getBaseRegister(); in determinePrologEpilogSGPRSaves()
1694 Register BasePtrReg = RI->getBaseRegister(); in assignCalleeSavedSpillSlots()
H A DSIRegisterInfo.cpp522 Register SIRegisterInfo::getBaseRegister() const { return AMDGPU::SGPR34; } in getBaseRegister() function in SIRegisterInfo
658 MCRegister BasePtrReg = getBaseRegister(); in getReservedRegs()
1728 ? getBaseRegister() in buildVGPRSpillLoadStore()
2082 ? getBaseRegister() in eliminateFrameIndex()