Searched refs:getBaseReg (Results 1 – 5 of 5) sorted by relevance
96 Register getBaseReg() const { return getOperand(2).getReg(); } in getBaseReg() function156 Register getBaseReg() const { return getOperand(2).getReg(); } in getBaseReg() function292 Register getBaseReg() const { return getReg(1); } in getBaseReg() function
609 if (Last.Ptr->getBaseReg() != New.Ptr->getBaseReg() || in optimizeConsecutiveMemOpAddressing()
5616 Register Base = ExtLd.getBaseReg(); in selectIndexedExtLoad()5703 Register Base = Ld.getBaseReg(); in selectIndexedLoad()5751 Register Base = I.getBaseReg(); in selectIndexedStore()
1058 !TLI.isIndexingLegal(LdSt, PtrAdd->getBaseReg(), Offset, in findPostIndexCandidate()1073 for (auto &BasePtrUse : MRI.use_nodbg_instructions(PtrAdd->getBaseReg())) { in findPostIndexCandidate()1105 Base = PtrAdd->getBaseReg(); in findPostIndexCandidate()2345 Register LHS = PtrAdd.getBaseReg(); in matchCombineConstPtrAddToI2P()3413 auto ConstVal = getIConstantVRegVal(PtrAdd.getBaseReg(), MRI); in matchPtrAddZero()3418 const MachineInstr *VecMI = MRI.getVRegDef(PtrAdd.getBaseReg()); in matchPtrAddZero()4512 Register Src1Reg = PtrAdd.getBaseReg(); in reassociationCanBreakAddressingModePattern()4605 if (!mi_match(MI.getBaseReg(), MRI, in matchReassocConstantInnerLHS()4638 Register LHSSrc1 = LHSPtrAdd->getBaseReg(); in matchReassocFoldConstantsInSubTree()4672 MachineInstr *LHS = MRI.getVRegDef(PtrAdd.getBaseReg()); in matchReassocPtrAdd()
465 unsigned getBaseReg() const { return BaseReg; } in getBaseReg() function in __anonb23049e20111::X86AsmParser::IntelExprStateMachine2193 if (!(SM.getBaseReg() || SM.getIndexReg() || SM.getImm())) { in RewriteIntelExpression()2203 if (SM.getBaseReg()) in RewriteIntelExpression()2204 BaseRegStr = X86IntelInstPrinter::getRegisterName(SM.getBaseReg()); in RewriteIntelExpression()2588 unsigned BaseReg = SM.getBaseReg(); in parseIntelOperand()