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Searched refs:getBaseIndex (Results 1 – 18 of 18) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DLiveInterval.h519 return beginIndex() > Start.getBaseIndex() && in isLocal()
544 const_iterator I = find(Idx.getBaseIndex()); in Query()
556 if (I->start <= Idx.getBaseIndex()) { in Query()
569 if (EarlyVal->def == Idx.getBaseIndex()) in Query()
589 if (Indexes->getNextNonNullIndex(S.start).getBaseIndex() < in isZeroLength()
590 S.end.getBaseIndex()) in isZeroLength()
H A DSlotIndexes.h227 SlotIndex getBaseIndex() const {
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/
H A DLiveIntervals.cpp1091 LiveRange::iterator OldIdxIn = LR.find(OldIdx.getBaseIndex()); in handleMoveDown()
1118 LR.advanceTo(Next, NewIdx.getBaseIndex()); in handleMoveDown()
1264 LiveRange::iterator OldIdxIn = LR.find(OldIdx.getBaseIndex()); in handleMoveUp()
1330 assert(NewIdxIn == LR.find(NewIdx.getBaseIndex())); in handleMoveUp()
1715 assert(VNI->def.getBaseIndex() == Pos.getBaseIndex()); in removeVRegDefAt()
1722 if (SVNI->def.getBaseIndex() == Pos.getBaseIndex()) in removeVRegDefAt()
H A DRenameIndependentSubregs.cpp191 : Pos.getBaseIndex(); in findComponents()
225 : Pos.getBaseIndex(); in rewriteOperands()
H A DSplitKit.cpp668 Idx = Idx.getBaseIndex(); in enterIntvBefore()
784 Idx = Idx.getBaseIndex(); in leaveIntvBefore()
1697 LeaveBefore.getBaseIndex() > EnterAfter.getBoundaryIndex())) { in splitLiveThroughBlock()
1860 if (!EnterAfter || EnterAfter < BI.FirstInstr.getBaseIndex()) { in splitRegOutBlock()
H A DVirtRegMap.cpp515 SlotIndex BeforeMIUses = MIIndex.getBaseIndex(); in subRegLiveThrough()
H A DRegisterPressure.cpp622 Pos.getBaseIndex()); in adjustLaneLiveness()
1256 Pos.getBaseIndex(), LaneBitmask::getNone(), in getLastUsedLanes()
H A DRegAllocGreedy.cpp1500 BI.LiveIn ? BI.FirstInstr.getBaseIndex() : BI.FirstInstr; in calcGapWeights()
1533 if (Uses[Gap+1].getBaseIndex() >= IntI.stop()) in calcGapWeights()
1557 if (Uses[Gap+1].getBaseIndex() >= I->end) in calcGapWeights()
H A DInlineSpiller.cpp632 VNInfo *ParentVNI = VirtReg.getVNInfoAt(UseIdx.getBaseIndex()); in reMaterializeFor()
H A DTwoAddressInstructionPass.cpp1632 if (S->end.getBaseIndex() != UseIdx) in processTiedPairs()
H A DRegisterCoalescer.cpp1023 if (S->start.getBaseIndex() == CopyIdx.getBaseIndex()) in removeCopyByCommutingDef()
H A DLiveDebugVariables.cpp1593 Idx = Idx.getBaseIndex(); in findInsertLocation()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DGCNRegPressure.h274 Indexes.push_back(After ? SI.getDeadSlot() : SI.getBaseIndex()); in getLiveRegMap()
313 return getLiveRegs(LIS.getInstructionIndex(MI).getBaseIndex(), LIS, in getLiveRegsBefore()
H A DGCNRegPressure.cpp195 InstrSI = LIS.getInstructionIndex(*MO.getParent()).getBaseIndex(); in collectVirtualRegUses()
354 : LIS.getInstructionIndex(*NextMI).getBaseIndex(); in advanceBeforeNext()
464 const auto &SI = LIS.getInstructionIndex(*LastTrackedMI).getBaseIndex(); in isValid()
H A DSIWholeQuadMode.cpp1154 SlotIndex Next = S->start.getBaseIndex(); in prepareInsertion()
1159 MachineInstr *EndMI = LIS->getInstructionFromIndex(S->end.getBaseIndex()); in prepareInsertion()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.cpp374 for (SlotIndex I = S.start.getBaseIndex(), E = S.end.getBaseIndex(); in shouldCoalesce()
/freebsd-14.2/contrib/llvm-project/clang/lib/AST/
H A DExprConstant.cpp3418 static unsigned getBaseIndex(const CXXRecordDecl *Derived, in getBaseIndex() function
3866 O = &O->getStructBase(getBaseIndex(Derived, Base)); in findSubobject()
10231 Value = &Value->getStructBase(getBaseIndex(RD, Base)); in VisitCastExpr()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrInfo.cpp1192 if (S->end.getBaseIndex() == Idx) in classifyLEAReg()