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Searched refs:funct3 (Results 1 – 18 of 18) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrFormatsC.td46 let Inst{15-13} = funct3;
62 let Inst{15-13} = funct3;
73 let Inst{15-13} = funct3;
87 let Inst{15-13} = funct3;
245 bits<3> funct3;
262 bits<3> funct3;
278 bits<3> funct3;
294 bits<3> funct3;
313 bits<3> funct3;
350 bits<3> funct3;
[all …]
H A DRISCVInstrInfoXCV.td26 : CVInstBitManipRII<funct2, funct3, (outs GPR:$rd),
73 : RVInstR<funct7, funct3, OPC_CUSTOM_1,
91 : CVInstMacMulN<funct2, funct3, (outs GPR:$rd_wb),
95 : CVInstMacMulN<funct2, funct3, (outs GPR:$rd),
319 : CVInstSIMDRI<funct5, F, funct3, OPC_CUSTOM_3,
327 : CVInstSIMDRI<funct5, F, funct3, OPC_CUSTOM_3,
332 : CVInstSIMDRI<funct5, F, funct3, OPC_CUSTOM_3,
545 let Inst{14-12} = funct3;
595 let Inst{14-12} = funct3;
611 let Inst{14-12} = funct3;
[all …]
H A DRISCVInstrInfoZimop.td16 class RVInstIMopr<bits<7> imm7, bits<5> imm5, bits<3> funct3, RISCVOpcode opcode,
18 : RVInstIBase<funct3, opcode, outs, ins, opcodestr, argstr> {
27 class RVInstRMoprr<bits<4> imm4, bits<3> imm3, bits<3> funct3, RISCVOpcode opcode,
29 : RVInstRBase<funct3, opcode, outs, ins, opcodestr, argstr> {
38 class RVMopr<bits<7> imm7, bits<5> imm5, bits<3> funct3,
40 : RVInstIMopr<imm7, imm5, funct3, opcode, (outs GPR:$rd), (ins GPR:$rs1),
44 class RVMoprr<bits<4> imm4, bits<3> imm3, bits<3> funct3,
46 : RVInstRMoprr<imm4, imm3, funct3, opcode, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2),
H A DRISCVInstrFormats.td295 let Inst{14-12} = funct3;
343 let Inst{14-12} = funct3;
375 let Inst{14-12} = funct3;
423 let Inst{14-12} = funct3;
439 let Inst{14-12} = funct3;
478 bits<3> funct3;
487 let Inst{14-12} = funct3;
498 bits<3> funct3;
519 bits<3> funct3;
537 bits<3> funct3;
[all …]
H A DRISCVInstrInfoC.td242 class CStackLoad<bits<3> funct3, string OpcodeStr,
248 class CStackStore<bits<3> funct3, string OpcodeStr,
254 class CLoad_ri<bits<3> funct3, string OpcodeStr,
260 class CStore_rri<bits<3> funct3, string OpcodeStr,
266 class Bcz<bits<3> funct3, string OpcodeStr,
786 uimm3:$funct3,
801 uimm3:$funct3,
803 "$opcode, $funct3, $imm11">;
814 def : InstAlias<".insn_ci $opcode, $funct3, $rd, $imm6",
817 def : InstAlias<".insn_ciw $opcode, $funct3, $rd, $imm8",
[all …]
H A DRISCVInstrInfoZa.td43 class AMO_cas<bits<5> funct5, bit aq, bit rl, bits<3> funct3, string opcodestr,
45 : RVInstRAtomic<funct5, aq, rl, funct3, OPC_AMO,
49 multiclass AMO_cas_aq_rl<bits<5> funct5, bits<3> funct3, string opcodestr,
51 def "" : AMO_cas<funct5, 0, 0, funct3, opcodestr, RC>;
52 def _AQ : AMO_cas<funct5, 1, 0, funct3, opcodestr # ".aq", RC>;
53 def _RL : AMO_cas<funct5, 0, 1, funct3, opcodestr # ".rl", RC>;
54 def _AQ_RL : AMO_cas<funct5, 1, 1, funct3, opcodestr # ".aqrl", RC>;
H A DRISCVInstrInfoA.td19 class LR_r<bit aq, bit rl, bits<3> funct3, string opcodestr>
20 : RVInstRAtomic<0b00010, aq, rl, funct3, OPC_AMO,
26 multiclass LR_r_aq_rl<bits<3> funct3, string opcodestr> {
27 def "" : LR_r<0, 0, funct3, opcodestr>;
28 def _AQ : LR_r<1, 0, funct3, opcodestr # ".aq">;
29 def _RL : LR_r<0, 1, funct3, opcodestr # ".rl">;
30 def _AQ_RL : LR_r<1, 1, funct3, opcodestr # ".aqrl">;
35 : RVInstRAtomic<funct5, aq, rl, funct3, OPC_AMO,
40 def "" : AMO_rr<funct5, 0, 0, funct3, opcodestr>;
41 def _AQ : AMO_rr<funct5, 1, 0, funct3, opcodestr # ".aq">;
[all …]
H A DRISCVInstrInfo.td501 class BranchCC_rri<bits<3> funct3, string opcodestr>
502 : RVInstB<funct3, OPC_BRANCH, (outs),
511 class Load_ri<bits<3> funct3, string opcodestr>
526 class Store_rri<bits<3> funct3, string opcodestr>
527 : RVInstS<funct3, OPC_STORE, (outs),
540 class ALU_ri<bits<3> funct3, string opcodestr>
553 class ALU_rr<bits<7> funct7, bits<3> funct3, string opcodestr,
562 class CSR_ir<bits<3> funct3, string opcodestr>
568 class CSR_ii<bits<3> funct3, string opcodestr>
569 : RVInstI<funct3, OPC_SYSTEM, (outs GPR:$rd),
[all …]
H A DRISCVInstrInfoXVentana.td19 class VTMaskedMove<bits<3> funct3, string opcodestr>
20 : RVInstR<0b0000000, funct3, OPC_CUSTOM_3, (outs GPR:$rd),
H A DRISCVInstrInfoF.td160 class FPLoad_r<bits<3> funct3, string opcodestr, DAGOperand rty,
162 : RVInstI<funct3, OPC_LOAD_FP, (outs rty:$rd),
168 class FPStore_r<bits<3> funct3, string opcodestr, DAGOperand rty,
170 : RVInstS<funct3, OPC_STORE_FP, (outs),
190 class FPALU_rr<bits<7> funct7, bits<3> funct3, string opcodestr,
192 : RVInstR<funct7, funct3, OPC_OP_FP, (outs rty:$rd),
196 multiclass FPALU_rr_m<bits<7> funct7, bits<3> funct3, string opcodestr,
218 class FPUnaryOp_r<bits<7> funct7, bits<5> rs2val, bits<3> funct3,
269 class FPCmp_rr<bits<7> funct7, bits<3> funct3, string opcodestr,
271 : RVInstR<funct7, funct3, OPC_OP_FP, (outs GPR:$rd),
[all …]
H A DRISCVInstrInfoZk.td56 class RVKUnary<bits<12> imm12, bits<3> funct3, string opcodestr>
57 : RVInstIUnary<imm12, funct3, OPC_OP_IMM, (outs GPR:$rd), (ins GPR:$rs1),
70 class RVKUnary_rnum<bits<7> funct7, bits<3> funct3, string opcodestr>
71 : RVInstIBase<funct3, OPC_OP_IMM, (outs GPR:$rd),
H A DRISCVInstrInfoZfa.td49 class FPBinaryOp_rr<bits<7> funct7, bits<3> funct3, DAGOperand rdty,
51 : RVInstR<funct7, funct3, OPC_OP_FP, (outs rdty:$rd),
55 class FPFLI_r<bits<7> funct7, bits<5> rs2val, bits<3> funct3,
57 : RVInstR<funct7, funct3, OPC_OP_FP, (outs rdty:$rd),
H A DRISCVInstrInfoXTHead.td81 class THShiftALU_rri<bits<3> funct3, string opcodestr>
82 : RVInstRBase<funct3, OPC_CUSTOM_0, (outs GPR:$rd),
92 class THShift_ri<bits<5> funct5, bits<3> funct3, string opcodestr>
93 : RVInstIShift<funct5, funct3, OPC_CUSTOM_0, (outs GPR:$rd),
97 class THBitfieldExtract_rii<bits<3> funct3, string opcodestr>
98 : RVInstIBase<funct3, OPC_CUSTOM_0, (outs GPR:$rd),
114 class THShiftW_ri<bits<7> funct7, bits<3> funct3, string opcodestr>
115 : RVInstIShiftW<funct7, funct3, OPC_CUSTOM_0, (outs GPR:$rd),
H A DRISCVInstrInfoXSf.td58 class RVInstVCCustom2<bits<4> funct6_hi4, bits<3> funct3, dag outs, dag ins,
72 let Inst{14-12} = funct3;
80 class RVInstVCFCustom2<bits<4> funct6_hi4, bits<3> funct3, dag outs, dag ins,
95 let Inst{14-12} = funct3;
H A DRISCVInstrInfoZb.td282 class RVBUnary<bits<12> imm12, bits<3> funct3,
284 : RVInstIUnary<imm12, funct3, opcode, (outs GPR:$rd), (ins GPR:$rs1),
288 class RVBShift_ri<bits<5> imm11_7, bits<3> funct3, RISCVOpcode opcode,
290 : RVInstIShift<imm11_7, funct3, opcode, (outs GPR:$rd),
295 class RVBShiftW_ri<bits<7> imm11_5, bits<3> funct3, RISCVOpcode opcode,
297 : RVInstIShiftW<imm11_5, funct3, opcode, (outs GPR:$rd),
/freebsd-14.2/contrib/llvm-project/compiler-rt/lib/sanitizer_common/
H A Dsanitizer_linux.cpp2043 unsigned funct3 = (faulty_instruction >> 12) & 0x7; // bits 12-14, inclusive in GetWriteFlag() local
2046 switch (funct3) { in GetWriteFlag()
2060 switch (funct3) { in GetWriteFlag()
2073 switch (funct3) { in GetWriteFlag()
2083 switch (funct3) { in GetWriteFlag()
/freebsd-14.2/contrib/llvm-project/lldb/source/Plugins/Instruction/RISCV/
H A DEmulateInstructionRISCV.cpp168 static bool CompareB(uint64_t rs1, uint64_t rs2, uint32_t funct3) { in CompareB() argument
169 switch (funct3) { in CompareB()
358 if (bne_exit.funct3 != BNE) in AtomicSequence()
374 if (bne_start.funct3 != BNE) in AtomicSequence()
699 CompareB(rs1, rs2, inst.funct3)) in operator ()()
H A DRISCVInstructions.h106 uint32_t funct3; member