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Searched refs:fsub (Results 1 – 25 of 55) sorted by relevance

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/freebsd-14.2/sys/crypto/openssl/powerpc/
H A Dpoly1305-ppcfp.S74 fsub 0,0,8
75 fsub 2,2,9
76 fsub 4,4,10
77 fsub 6,6,11
97 fsub 1,1,8
98 fsub 3,3,9
106 fsub 0,0,1
107 fsub 2,2,3
108 fsub 4,4,5
109 fsub 6,6,7
[all …]
/freebsd-14.2/sys/crypto/openssl/powerpc64/
H A Dpoly1305-ppcfp.S77 fsub 0,0,8
78 fsub 2,2,9
79 fsub 4,4,10
80 fsub 6,6,11
100 fsub 1,1,8
101 fsub 3,3,9
109 fsub 0,0,1
110 fsub 2,2,3
111 fsub 4,4,5
112 fsub 6,6,7
[all …]
/freebsd-14.2/sys/crypto/openssl/powerpc64le/
H A Dpoly1305-ppcfp.S77 fsub 0,0,8
78 fsub 2,2,9
79 fsub 4,4,10
80 fsub 6,6,11
100 fsub 1,1,8
101 fsub 3,3,9
109 fsub 0,0,1
110 fsub 2,2,3
111 fsub 4,4,5
112 fsub 6,6,7
[all …]
/freebsd-14.2/bin/pax/
H A Doptions.c99 FSUB fsub[] = { variable
370 if ((frmt = (FSUB *)bsearch((void *)&tmp, (void *)fsub, in pax_options()
377 for (i = 0; i < (sizeof(fsub)/sizeof(FSUB)); ++i) in pax_options()
378 (void)fprintf(stderr, " %s", fsub[i].name); in pax_options()
549 frmt = &(fsub[DEFLT]); in pax_options()
830 frmt = &(fsub[tar_Oflag ? F_OTAR : F_TAR]); in tar_options()
1054 frmt = &(fsub[F_ACPIO]); in cpio_options()
1093 frmt = &(fsub[F_CPIO]); in cpio_options()
1197 for (i = 0; i < (sizeof(fsub)/sizeof(FSUB)); ++i) in cpio_options()
1198 (void)fprintf(stderr, " %s", fsub[i].name); in cpio_options()
[all …]
H A Dpax.h73 typedef struct fsub FSUB;
87 struct fsub { struct
H A Dar_subs.c1138 if (fsub[ford[i]].hsz < minhd) in get_arc()
1139 minhd = fsub[ford[i]].hsz; in get_arc()
1189 if ((*fsub[ford[i]].id)(hdbuf, hdsz) < 0) in get_arc()
1191 frmt = &(fsub[ford[i]]); in get_arc()
H A Dextern.h182 extern FSUB fsub[];
/freebsd-14.2/lib/libc/arm/aeabi/
H A Daeabi_vfp_float.S182 AEABI_ENTRY(fsub)
187 AEABI_END(fsub)
H A Daeabi_float.c74 float32 AEABI_FUNC2(fsub, float32, float32_sub) in AEABI_FUNC2()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYInstrInfoF1.td109 def FSUBM : F_XYZ<0x2, 0b000001, "fsubm", "", BinOpFrag<(fsub node:$LHS, node:$RHS)>, sFPR64_V_OP>;
113 def FMSCM : F_ACCUM_XYZ<0x2, 0b010101, "fmscm", "", TriOpFrag<(fsub (fmul node:$MHS, node:$RHS), no…
114 def FNMACM : F_ACCUM_XYZ<0x2, 0b010110, "fnmacm", "", TriOpFrag<(fsub node:$LHS, (fmul node:$MHS, n…
124 defm FSUB : FT_XYZ<0b000001, "fsub", BinOpFrag<(fsub node:$LHS, node:$RHS)>>;
129 defm FMSC : FT_ACCUM_XYZ<0b010101, "fmsc", TriOpFrag<(fsub (fmul node:$MHS, node:$RHS), node:$LHS…
130 defm FNMAC : FT_ACCUM_XYZ<0b010110, "fnmac", TriOpFrag<(fsub node:$LHS, (fmul node:$MHS, node:$RHS…
H A DCSKYInstrInfoF2.td44 defm f2FSUB : F2_XYZ_T<0b000001, "fsub", BinOpFrag<(fsub node:$LHS, node:$RHS)>>;
188 TriOpFrag<(fsub node:$RHS, (fmul node:$LHS, node:$MHS))>>;
206 TriOpFrag<(fneg (fsub node:$RHS, (fmul node:$LHS, node:$MHS)))>>;
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsInstrFPU.td213 [(set RC:$fd, (fsub fpimm0, (OpNode (fmul RC:$fs, RC:$ft), RC:$fr)))],
678 def FSUB_S : MMRel, ADDS_FT<"sub.s", FGR32Opnd, II_SUB_S, 0, fsub>,
680 defm FSUB : ADDS_M<"sub.d", II_SUB_D, 0, fsub>, ADDS_FM<0x01, 17>,
687 def MSUB_S : MMRel, MADDS_FT<"msub.s", FGR32Opnd, II_MSUB_S, fsub>,
692 def MSUB_D32 : MMRel, MADDS_FT<"msub.d", AFGR64Opnd, II_MSUB_D, fsub>,
698 def MSUB_D64 : MADDS_FT<"msub.d", FGR64Opnd, II_MSUB_D, fsub>,
706 def NMSUB_S : MMRel, NMADDS_FT<"nmsub.s", FGR32Opnd, II_NMSUB_S, fsub>,
711 def NMSUB_D32 : MMRel, NMADDS_FT<"nmsub.d", AFGR64Opnd, II_NMSUB_D, fsub>,
717 def NMSUB_D64 : NMADDS_FT<"nmsub.d", FGR64Opnd, II_NMSUB_D, fsub>,
988 def : MipsPat<(fneg (fsub (fmul RC:$fs, RC:$ft), RC:$fr)),
H A DMicroMipsInstrFPU.td31 def FSUB_S_MM : MMRel, ADDS_FT<"sub.s", FGR32Opnd, II_SUB_S, 0, fsub>,
40 defm FSUB : ADDS_MMM<"sub.d", II_SUB_D, 0, fsub>,
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrAsmAlias.td390 def : InstAlias<"fsub{|r}p", (SUBR_FPrST0 ST1), 0>;
391 def : InstAlias<"fsub{r|}p", (SUB_FPrST0 ST1), 0>;
406 // Handle fmul/fadd/fsub/fdiv instructions with explicitly written st(0) op.
419 defm : FpUnaryAlias<"fsub", SUB_FST0r, 0>;
420 defm : FpUnaryAlias<"fsub{|r}p", SUBR_FPrST0, 0>;
422 defm : FpUnaryAlias<"fsub{r|}p", SUB_FPrST0, 0>;
440 def : InstAlias<"fsub{|r}p\t{$op, %st|st, $op}", (SUBR_FPrST0 RSTi:$op), 0>;
441 def : InstAlias<"fsub{r|}p\t{$op, %st|st, $op}", (SUB_FPrST0 RSTi:$op), 0>;
H A DX86InstrFPStack.td219 // of some of the 'reverse' forms of the fsub and fdiv instructions. As such,
226 def SUB_FrST0 : FPrST0Inst <MRM5r, "fsub{r}\t{%st, $op|$op, st}">;
227 def SUB_FPrST0 : FPrST0PInst<MRM5r, "fsub{r}p\t{%st, $op|$op, st}">;
228 def SUB_FST0r : FPST0rInst <MRM4r, "fsub\t{$op, %st|st, $op}">;
229 def SUBR_FrST0 : FPrST0Inst <MRM4r, "fsub{|r}\t{%st, $op|$op, st}">;
230 def SUBR_FPrST0 : FPrST0PInst<MRM4r, "fsub{|r}p\t{%st, $op|$op, st}">;
/freebsd-14.2/sys/powerpc/fpu/
H A Dfpu_emu.c129 FPU_EMU_EVCNT_DECL(fsub);
616 FPU_EMU_EVCNT_INCR(fsub); in fpu_execute()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/Target/GlobalISel/
H A DCombine.td1085 // Transform (fsub +-0.0, X) -> (fneg X)
1134 // Transform (fsub (fmul x, y), z) -> (fma x, y, -z)
1143 // Transform (fsub (fneg (fmul, x, y)), z) -> (fma (fneg x), y, (fneg z))
1144 // (fsub x, (fneg (fmul, y, z))) -> (fma y, z, x)
1152 // Transform (fsub (fpext (fmul x, y)), z) ->
1161 // Transform (fsub (fneg (fpext (fmul x, y))), z) ->
H A DSelectionDAGCompat.td101 def : GINodeEquiv<G_FSUB, fsub>;
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SMEInstrInfo.td283 defm FSUB_VG2_M2Z_S : sme2_multivec_accum_add_sub_vg2<"fsub", 0b0001, MatrixOp32, ZZ_s_mul_r, nxv4f…
284 defm FSUB_VG4_M4Z_S : sme2_multivec_accum_add_sub_vg4<"fsub", 0b0001, MatrixOp32, ZZZZ_s_mul_r, nxv…
794 defm FSUB_VG2_M2Z_D : sme2_multivec_accum_add_sub_vg2<"fsub", 0b1001, MatrixOp64, ZZ_d_mul_r, nxv2f…
795 defm FSUB_VG4_M4Z_D : sme2_multivec_accum_add_sub_vg4<"fsub", 0b1001, MatrixOp64, ZZZZ_d_mul_r, nxv…
817 defm FSUB_VG2_M2Z_H : sme2_multivec_accum_add_sub_vg2<"fsub", 0b0101, MatrixOp16, ZZ_h_mul_r, nxv8f…
818 defm FSUB_VG4_M4Z_H : sme2_multivec_accum_add_sub_vg4<"fsub", 0b0101, MatrixOp16, ZZZZ_h_mul_r, nxv…
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyInstrFloat.td49 defm SUB : BinaryFP<fsub, "sub ", 0x93, 0xa1>;
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/IR/
H A DVPIntrinsics.def317 // llvm.vp.fsub(x,y,mask,vlen)
318 HELPER_REGISTER_BINARY_FP_VP(fsub, VP_FSUB, FSub, FSUB)
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonPatternsHVX.td441 def: OpR_RR_pat_conv_hf<V6_vsub_hf, pf2<fsub>, VecF16, HVF16>;
444 def: OpR_RR_pat_conv<V6_vsub_sf, pf2<fsub>, VecF32, HVF32>;
465 def: Pat<(fsub HVF16:$Rs, HVF16:$Rt),
467 def: Pat<(fsub HVF32:$Rs, HVF32:$Rt),
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchFloat32InstrInfo.td166 def : PatFprFpr<fsub, FSUB_S, FPR32>;
H A DLoongArchFloat64InstrInfo.td138 def : PatFprFpr<fsub, FSUB_D, FPR64>;
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEInstrInfo.td1374 defm FSUBD : RRFm<"fsub.d", 0x5C, I64, f64, fsub>;
1376 defm FSUBS : RRFm<"fsub.s", 0x5C, F32, f32, fsub, simm7fp, mimmfp32>;
1408 defm FSUBQ : RRFm<"fsub.q", 0x7C, F128, f128, fsub>;

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