| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | MachineInstr.h | 1477 return findRegisterDefOperandIdx(Reg, false, false, TRI) != -1;
1485 return findRegisterDefOperandIdx(Reg, false, true, TRI) != -1;
1493 return findRegisterDefOperandIdx(Reg, true, false, TRI) != -1;
1527 int findRegisterDefOperandIdx(Register Reg,
1537 int Idx = findRegisterDefOperandIdx(Reg, isDead, Overlap, TRI);
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineCombiner.cpp | 235 int DefIdx = DefInstr->findRegisterDefOperandIdx(MO.getReg()); in getDepth()
247 DefInstr, DefInstr->findRegisterDefOperandIdx(MO.getReg()), in getDepth()
286 NewRoot, NewRoot->findRegisterDefOperandIdx(MO.getReg()), UseMO, in getLatency()
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| H A D | EarlyIfConversion.cpp | 602 int TIdx = TDef->findRegisterDefOperandIdx(TReg); in hasSameValue()
603 int FIdx = FDef->findRegisterDefOperandIdx(FReg); in hasSameValue()
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| H A D | AggressiveAntiDepBreaker.cpp | 682 int Idx = UseMI->findRegisterDefOperandIdx(NewReg, false, true, TRI); in FindSuitableFreeRegisters()
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| H A D | ModuloSchedule.cpp | 1676 assert(Def->findRegisterDefOperandIdx(MI.getOperand(1).getReg()) != -1); in moveStageBetweenBlocks()
1902 unsigned OpIdx = MI->findRegisterDefOperandIdx(Reg); in getEquivalentRegisterIn()
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| H A D | TwoAddressInstructionPass.cpp | 1358 unsigned NewDstIdx = NewMIs[1]->findRegisterDefOperandIdx(regA); in tryInstructionTransform()
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| H A D | MachineInstr.cpp | 1063 MachineInstr::findRegisterDefOperandIdx(Register Reg, bool isDead, bool Overlap, in findRegisterDefOperandIdx() function in MachineInstr
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| H A D | RegisterCoalescer.cpp | 851 int DefIdx = DefMI->findRegisterDefOperandIdx(IntA.reg()); in removeCopyByCommutingDef()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostSelectOptimize.cpp | 205 int DeadNZCVIdx = II.findRegisterDefOperandIdx(AArch64::NZCV); in optimizeNZCVDefs()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 646 if (DefMI->findRegisterDefOperandIdx(AArch64::NZCV, true) == -1) in canFoldIntoCSel()
674 if (DefMI->findRegisterDefOperandIdx(AArch64::NZCV, true) == -1) in canFoldIntoCSel()
1522 int DeadNZCVIdx = CmpInstr.findRegisterDefOperandIdx(AArch64::NZCV, true); in optimizeCompareInstr()
1849 if (MI.findRegisterDefOperandIdx(AArch64::NZCV, true) != -1) in canCmpInstrBeRemoved()
5906 MI->findRegisterDefOperandIdx(AArch64::NZCV, true) == -1) in canCombine()
6044 int Cmp_NZCV = Root.findRegisterDefOperandIdx(AArch64::NZCV, true); in getMaddPatterns()
6543 Root.findRegisterDefOperandIdx(AArch64::NZCV, true) == -1) in getMiscPatterns()
8012 if (DefMI->findRegisterDefOperandIdx(AArch64::NZCV, true) != -1) in optimizeCondBranch()
9218 MI.findRegisterDefOperandIdx(MI.getOperand(0).getReg() - AArch64::W0 + in isCopyInstrImpl()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | LegalizationArtifactCombiner.h | 905 DefOperandIdx = Unmerge->findRegisterDefOperandIdx(Def); in findUnmergeThatDefinesReg()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600InstrInfo.cpp | 214 return MI.findRegisterDefOperandIdx(R600::AR_X, false, false, &RI) != -1; in definesAddressRegister()
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| H A D | SIInstrInfo.cpp | 7191 int SCCIdx = Inst.findRegisterDefOperandIdx(AMDGPU::SCC); in moveToVALUImpl()
7457 if (CandI.findRegisterDefOperandIdx(AMDGPU::SCC, false, false, &RI) != in lowerSelect()
8289 if (MI.findRegisterDefOperandIdx(AMDGPU::SCC, false, false, &RI) != -1) in addSCCDefUsersToVALUWorklist()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMLowOverheadLoops.cpp | 94 return MI->findRegisterDefOperandIdx(ARM::VPR) != -1; in isVectorPredicate()
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| H A D | ARMBaseInstrInfo.cpp | 1735 int ImpDefIdx = MI.findRegisterDefOperandIdx(DstRegD); in expandPostRAPseudo()
4140 Idx = II->findRegisterDefOperandIdx(Reg, false, true, TRI); in getBundledDefMI()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 2742 return I1->findRegisterDefOperandIdx(InstAndDef1->Reg) == in matchEqualDefs()
2743 I2->findRegisterDefOperandIdx(InstAndDef2->Reg); in matchEqualDefs()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.cpp | 4309 int Idx = DefMI.findRegisterDefOperandIdx(SR, false, false, &HRI); in getOperandLatency()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 5798 UseMI.removeOperand(UseMI.findRegisterDefOperandIdx(X86::EFLAGS)); in FoldImmediateImpl()
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