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Searched refs:dsi (Results 1 – 25 of 251) sorted by relevance

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/freebsd-14.2/sys/compat/linuxkpi/common/src/
H A Dlinux_dmi.c82 slot = dsi->matches[i].slot; in linux_dmi_matches()
88 if (dsi->matches[i].exact_match) { in linux_dmi_matches()
92 dsi->matches[i].substr) != NULL) { in linux_dmi_matches()
117 const struct dmi_system_id *dsi; in linux_dmi_first_match() local
119 for (dsi = list; dsi->matches[0].slot != 0; dsi++) { in linux_dmi_first_match()
120 if (linux_dmi_matches(dsi)) in linux_dmi_first_match()
121 return (dsi); in linux_dmi_first_match()
135 const struct dmi_system_id *dsi; in linux_dmi_check_system() local
138 for (dsi = sysid; dsi->matches[0].slot != 0; dsi++) { in linux_dmi_check_system()
139 if (linux_dmi_matches(dsi)) { in linux_dmi_check_system()
[all …]
/freebsd-14.2/sys/contrib/device-tree/Bindings/display/msm/
H A Ddsi-controller-main.yaml17 - qcom,apq8064-dsi-ctrl
18 - qcom,msm8916-dsi-ctrl
19 - qcom,msm8953-dsi-ctrl
24 - qcom,sc7180-dsi-ctrl
73 const: dsi
79 qcom,dual-dsi-mode:
85 qcom,master-dsi:
91 qcom,sync-dual-dsi:
389 dsi@ae94000 {
390 compatible = "qcom,sc7180-dsi-ctrl", "qcom,mdss-dsi-ctrl";
[all …]
H A Ddsi-phy-7nm.yaml13 - $ref: dsi-phy-common.yaml#
18 - qcom,dsi-phy-7nm
19 - qcom,dsi-phy-7nm-8150
20 - qcom,sc7280-dsi-phy-7nm
21 - qcom,sm6375-dsi-phy-7nm
22 - qcom,sm8350-dsi-phy-5nm
23 - qcom,sm8450-dsi-phy-5nm
24 - qcom,sm8550-dsi-phy-4nm
28 - description: dsi phy register set
30 - description: dsi pll register set
[all …]
H A Ddsi-phy-28nm.yaml13 - $ref: dsi-phy-common.yaml#
18 - qcom,dsi-phy-28nm-hpm
19 - qcom,dsi-phy-28nm-hpm-fam-b
20 - qcom,dsi-phy-28nm-lp
21 - qcom,dsi-phy-28nm-8960
25 - description: dsi pll register set
26 - description: dsi phy register set
27 - description: dsi phy regulator register set
38 qcom,dsi-phy-regulator-ldo-mode:
55 dsi-phy@fd922a00 {
[all …]
H A Ddsi-phy-14nm.yaml4 $id: http://devicetree.org/schemas/display/msm/dsi-phy-14nm.yaml#
13 - $ref: dsi-phy-common.yaml#
18 - qcom,dsi-phy-14nm
19 - qcom,dsi-phy-14nm-2290
20 - qcom,dsi-phy-14nm-660
21 - qcom,dsi-phy-14nm-8953
25 - description: dsi phy register set
26 - description: dsi phy lane register set
27 - description: dsi pll register set
50 dsi-phy@ae94400 {
[all …]
H A Ddsi.txt6 * "qcom,mdss-dsi-ctrl"
86 * "qcom,dsi-phy-28nm-lp"
87 * "qcom,dsi-phy-20nm"
89 * "qcom,dsi-phy-14nm"
91 * "qcom,dsi-phy-10nm"
93 * "qcom,dsi-phy-7nm"
148 dsi0: dsi@fd922800 {
185 phy-names ="dsi-phy";
187 qcom,dual-dsi-mode;
188 qcom,master-dsi;
[all …]
H A Ddsi-phy-20nm.yaml4 $id: http://devicetree.org/schemas/display/msm/dsi-phy-20nm.yaml#
13 - $ref: dsi-phy-common.yaml#
17 const: qcom,dsi-phy-20nm
21 - description: dsi pll register set
22 - description: dsi phy register set
23 - description: dsi phy regulator register set
51 dsi-phy@fd922a00 {
52 compatible = "qcom,dsi-phy-20nm";
H A Dqcom,msm8998-mdss.yaml45 "^dsi@[0-9a-f]+$":
50 - const: qcom,msm8998-dsi-ctrl
51 - const: qcom,mdss-dsi-ctrl
57 const: qcom,dsi-phy-10nm-8998
132 dsi@c994000 {
133 compatible = "qcom,msm8998-dsi-ctrl", "qcom,mdss-dsi-ctrl";
159 phy-names = "dsi";
184 compatible = "qcom,dsi-phy-10nm-8998";
202 dsi@c996000 {
203 compatible = "qcom,msm8998-dsi-ctrl", "qcom,mdss-dsi-ctrl";
[all …]
H A Dqcom,sdm845-mdss.yaml55 "^dsi@[0-9a-f]+$":
60 - const: qcom,sdm845-dsi-ctrl
61 - const: qcom,mdss-dsi-ctrl
67 const: qcom,dsi-phy-10nm
140 dsi@ae94000 {
141 compatible = "qcom,sdm845-dsi-ctrl", "qcom,mdss-dsi-ctrl";
168 phy-names = "dsi";
193 compatible = "qcom,dsi-phy-10nm";
210 dsi@ae96000 {
211 compatible = "qcom,sdm845-dsi-ctrl", "qcom,mdss-dsi-ctrl";
[all …]
H A Dqcom,sm8450-mdss.yaml45 "^dsi@[0-9a-f]+$":
50 - const: qcom,sm8450-dsi-ctrl
51 - const: qcom,mdss-dsi-ctrl
57 const: qcom,sm8450-dsi-phy-5nm
179 dsi@ae94000 {
180 compatible = "qcom,sm8450-dsi-ctrl", "qcom,mdss-dsi-ctrl";
208 phy-names = "dsi";
257 compatible = "qcom,sm8450-dsi-phy-5nm";
274 dsi@ae96000 {
275 compatible = "qcom,sm8450-dsi-ctrl", "qcom,mdss-dsi-ctrl";
[all …]
H A Dqcom,sm8150-mdss.yaml54 "^dsi@[0-9a-f]+$":
59 - const: qcom,sm8150-dsi-ctrl
60 - const: qcom,mdss-dsi-ctrl
66 const: qcom,dsi-phy-7nm
171 dsi@ae94000 {
172 compatible = "qcom,sm8150-dsi-ctrl", "qcom,mdss-dsi-ctrl";
200 phy-names = "dsi";
244 compatible = "qcom,dsi-phy-7nm";
261 dsi@ae96000 {
262 compatible = "qcom,sm8150-dsi-ctrl", "qcom,mdss-dsi-ctrl";
[all …]
H A Dqcom,sm8250-mdss.yaml53 "^dsi@[0-9a-f]+$":
58 - const: qcom,sm8250-dsi-ctrl
59 - const: qcom,mdss-dsi-ctrl
65 const: qcom,dsi-phy-7nm
173 dsi@ae94000 {
174 compatible = "qcom,sm8250-dsi-ctrl", "qcom,mdss-dsi-ctrl";
202 phy-names = "dsi";
246 compatible = "qcom,dsi-phy-7nm";
263 dsi@ae96000 {
264 compatible = "qcom,sm8250-dsi-ctrl", "qcom,mdss-dsi-ctrl";
[all …]
H A Dqcom,sm8550-mdss.yaml45 "^dsi@[0-9a-f]+$":
50 - const: qcom,sm8550-dsi-ctrl
51 - const: qcom,mdss-dsi-ctrl
57 const: qcom,sm8550-dsi-phy-4nm
174 dsi@ae94000 {
175 compatible = "qcom,sm8550-dsi-ctrl", "qcom,mdss-dsi-ctrl";
203 phy-names = "dsi";
247 compatible = "qcom,sm8550-dsi-phy-4nm";
263 dsi@ae96000 {
264 compatible = "qcom,sm8550-dsi-ctrl", "qcom,mdss-dsi-ctrl";
[all …]
H A Ddsi-phy-10nm.yaml4 $id: http://devicetree.org/schemas/display/msm/dsi-phy-10nm.yaml#
13 - $ref: dsi-phy-common.yaml#
18 - qcom,dsi-phy-10nm
19 - qcom,dsi-phy-10nm-8998
23 - description: dsi phy register set
24 - description: dsi phy lane register set
25 - description: dsi pll register set
80 dsi-phy@ae94400 {
81 compatible = "qcom,dsi-phy-10nm";
/freebsd-14.2/sys/contrib/device-tree/Bindings/display/tegra/
H A Dnvidia,tegra20-dsi.yaml17 - nvidia,tegra20-dsi
18 - nvidia,tegra30-dsi
19 - nvidia,tegra114-dsi
20 - nvidia,tegra124-dsi
21 - nvidia,tegra210-dsi
22 - nvidia,tegra186-dsi
48 - const: dsi
55 avdd-dsi-csi-supply:
104 - const: dsi
116 - const: dsi
[all …]
H A Dnvidia,tegra186-dsi-padctl.yaml4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra186-dsi-padctl.yaml#
18 const: nvidia,tegra186-dsi-padctl
29 - const: dsi
41 compatible = "nvidia,tegra186-dsi-padctl";
44 reset-names = "dsi";
/freebsd-14.2/sys/contrib/device-tree/Bindings/display/
H A Dallwinner,sun6i-a31-mipi-dsi.yaml17 - allwinner,sun6i-a31-mipi-dsi
18 - allwinner,sun50i-a64-mipi-dsi
19 - allwinner,sun50i-a100-mipi-dsi
21 - const: allwinner,sun20i-d1-mipi-dsi
44 vcc-dsi-supply:
70 - $ref: dsi-controller.yaml#
76 - allwinner,sun6i-a31-mipi-dsi
97 - allwinner,sun6i-a31-mipi-dsi
102 - vcc-dsi-supply
108 dsi0: dsi@1ca0000 {
[all …]
H A Dst,stm32-dsi.yaml4 $id: http://devicetree.org/schemas/display/st,stm32-dsi.yaml#
17 - $ref: dsi-controller.yaml#
21 const: st,stm32-dsi
47 phy-dsi-supply:
93 dsi: dsi@5a000000 {
94 compatible = "st,stm32-dsi";
100 phy-dsi-supply = <&reg18>;
/freebsd-14.2/sys/contrib/device-tree/Bindings/display/rockchip/
H A Drockchip,dw-mipi-dsi.yaml17 - rockchip,px30-mipi-dsi
18 - rockchip,rk3288-mipi-dsi
19 - rockchip,rk3399-mipi-dsi
20 - rockchip,rk3568-mipi-dsi
21 - const: snps,dw-mipi-dsi
78 - rockchip,px30-mipi-dsi
79 - rockchip,rk3568-mipi-dsi
97 const: rockchip,rk3288-mipi-dsi
111 const: rockchip,rk3399-mipi-dsi
129 mipi_dsi: dsi@ff960000 {
[all …]
H A Ddw_mipi_dsi_rockchip.txt8 "rockchip,px30-mipi-dsi", "snps,dw-mipi-dsi"
9 "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi"
10 "rockchip,rk3399-mipi-dsi", "snps,dw-mipi-dsi"
11 "rockchip,rk3568-mipi-dsi", "snps,dw-mipi-dsi"
28 - power-domains: a phandle to mipi dsi power domain node.
40 compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi";
/freebsd-14.2/sys/contrib/device-tree/Bindings/display/mediatek/
H A Dmediatek,dsi.yaml4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,dsi.yaml#
21 - $ref: /schemas/display/dsi-controller.yaml#
26 - mediatek,mt2701-dsi
27 - mediatek,mt7623-dsi
28 - mediatek,mt8167-dsi
29 - mediatek,mt8173-dsi
30 - mediatek,mt8183-dsi
31 - mediatek,mt8186-dsi
96 dsi0: dsi@14014000 {
97 compatible = "mediatek,mt8183-dsi";
/freebsd-14.2/sys/contrib/device-tree/Bindings/display/bridge/
H A Dcdns,dsi.yaml4 $id: http://devicetree.org/schemas/display/bridge/cdns,dsi.yaml#
18 - cdns,dsi
19 - ti,j721e-dsi
74 - $ref: ../dsi-controller.yaml#
80 const: ti,j721e-dsi
111 dsi@fd0c0000 {
112 compatible = "cdns,dsi";
148 dsi@fd0c0000 {
149 compatible = "cdns,dsi";
H A Dsamsung,mipi-dsim.yaml22 - samsung,exynos3250-mipi-dsi
23 - samsung,exynos4210-mipi-dsi
24 - samsung,exynos5410-mipi-dsi
25 - samsung,exynos5422-mipi-dsi
26 - samsung,exynos5433-mipi-dsi
119 - $ref: ../dsi-controller.yaml#
124 const: samsung,exynos5433-mipi-dsi
152 const: samsung,exynos5410-mipi-dsi
172 const: samsung,exynos4210-mipi-dsi
192 const: samsung,exynos3250-mipi-dsi
[all …]
H A Dnwl-dsi.yaml4 $id: http://devicetree.org/schemas/display/bridge/nwl-dsi.yaml#
14 NWL MIPI-DSI host controller found on i.MX8 platforms. This is a dsi bridge for
18 - $ref: ../dsi-controller.yaml#
22 const: fsl,imx8mq-nwl-dsi
74 - description: dsi byte reset line
75 - description: dsi dpi reset line
76 - description: dsi esc reset line
77 - description: dsi pclk reset line
147 dsi@30a00000 {
150 compatible = "fsl,imx8mq-nwl-dsi";
/freebsd-14.2/sys/contrib/device-tree/Bindings/phy/
H A Drockchip,px30-dsi-dphy.yaml4 $id: http://devicetree.org/schemas/phy/rockchip,px30-dsi-dphy.yaml#
18 - rockchip,px30-dsi-dphy
19 - rockchip,rk3128-dsi-dphy
20 - rockchip,rk3368-dsi-dphy
21 - rockchip,rk3568-dsi-dphy
62 compatible = "rockchip,px30-dsi-dphy";

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