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Searched refs:dmar_write4 (Results 1 – 5 of 5) sorted by relevance

/freebsd-14.2/sys/x86/iommu/
H A Dintel_fault.c118 dmar_write4(unit, DMAR_FSTS_REG, clear); in dmar_fault_intr_clear()
145 dmar_write4(unit, frir + 12, DMAR_FRCD2_F32); in dmar_fault_intr()
177 dmar_write4(unit, DMAR_FSTS_REG, DMAR_FSTS_PFO); in dmar_fault_intr()
254 dmar_write4(unit, frir + 12, DMAR_FRCD2_F32); in dmar_clear_faults()
257 dmar_write4(unit, DMAR_FSTS_REG, fsts); in dmar_clear_faults()
318 dmar_write4(unit, DMAR_FECTL_REG, fectl); in dmar_enable_fault_intr()
330 dmar_write4(unit, DMAR_FECTL_REG, fectl | DMAR_FECTL_IM); in dmar_disable_fault_intr()
H A Dintel_utils.c278 dmar_write4(unit, DMAR_GCMD_REG, unit->hw_gcmd | DMAR_GCMD_SRTP); in dmar_load_root_entry_ptr()
349 dmar_write4(unit, DMAR_GCMD_REG, unit->hw_gcmd | DMAR_GCMD_WBF); in dmar_flush_write_bufs()
378 dmar_write4(unit, DMAR_PMEN_REG, reg); in dmar_disable_protected_regions()
392 dmar_write4(unit, DMAR_GCMD_REG, unit->hw_gcmd); in dmar_enable_translation()
405 dmar_write4(unit, DMAR_GCMD_REG, unit->hw_gcmd); in dmar_disable_translation()
427 dmar_write4(unit, DMAR_GCMD_REG, unit->hw_gcmd | DMAR_GCMD_SIRTP); in dmar_load_irt_ptr()
441 dmar_write4(unit, DMAR_GCMD_REG, unit->hw_gcmd); in dmar_enable_ir()
454 dmar_write4(unit, DMAR_GCMD_REG, unit->hw_gcmd); in dmar_disable_ir()
H A Dintel_qi.c68 dmar_write4(unit, DMAR_GCMD_REG, unit->hw_gcmd); in dmar_enable_qi()
81 dmar_write4(unit, DMAR_GCMD_REG, unit->hw_gcmd); in dmar_disable_qi()
94 dmar_write4(unit, DMAR_IQT_REG, unit->x86c.inv_queue_tail); in dmar_qi_advance_tail()
319 dmar_write4(unit, DMAR_ICS_REG, ics); in dmar_qi_task()
380 dmar_write4(unit, DMAR_ICS_REG, ics); in dmar_init_qi()
416 dmar_write4(unit, DMAR_IECTL_REG, iectl); in dmar_enable_qi_intr()
430 dmar_write4(unit, DMAR_IECTL_REG, iectl | DMAR_IECTL_IM); in dmar_disable_qi_intr()
H A Dintel_drv.c286 dmar_write4(unit, dmd->msi_data_reg, dmd->msi_data); in dmar_remap_intr()
287 dmar_write4(unit, dmd->msi_addr_reg, dmd->msi_addr); in dmar_remap_intr()
288 dmar_write4(unit, dmd->msi_uaddr_reg, in dmar_remap_intr()
413 dmar_write4(unit, dmd->msi_data_reg, dmd->msi_data); in dmar_attach()
414 dmar_write4(unit, dmd->msi_addr_reg, dmd->msi_addr); in dmar_attach()
415 dmar_write4(unit, dmd->msi_uaddr_reg, dmd->msi_addr >> 32); in dmar_attach()
434 dmar_write4(unit, dmd->msi_data_reg, dmd->msi_data); in dmar_attach()
435 dmar_write4(unit, dmd->msi_addr_reg, dmd->msi_addr); in dmar_attach()
436 dmar_write4(unit, dmd->msi_uaddr_reg, dmd->msi_addr >> 32); in dmar_attach()
H A Dintel_dmar.h292 dmar_write4(const struct dmar_unit *unit, int reg, uint32_t val) in dmar_write4() function