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Searched refs:divider (Results 1 – 25 of 178) sorted by relevance

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/freebsd-14.2/sys/dev/extres/clk/
H A Dclk_div.c88 return (divider); in clknode_div_table_get_divider()
92 return (table->divider); in clknode_div_table_get_divider()
106 if (table->divider == *divider) { in clknode_div_table_get_value()
137 sc->divider = clknode_div_table_get_divider(sc, sc->divider); in clknode_div_init()
138 if (sc->divider == 0) in clknode_div_init()
151 if (sc->divider == 0) { in clknode_div_recalc()
175 _fout = _fin / divider; in clknode_div_set_freq()
179 divider--; in clknode_div_set_freq()
181 divider++; in clknode_div_set_freq()
233 sc->divider = divider; in clknode_div_set_freq()
[all …]
/freebsd-14.2/sys/arm64/qoriq/clk/
H A Dls1028a_flexspi_clk.c62 { .value = 0, .divider = 1, },
63 { .value = 1, .divider = 2, },
64 { .value = 2, .divider = 3, },
65 { .value = 3, .divider = 4, },
66 { .value = 4, .divider = 5, },
67 { .value = 5, .divider = 6, },
68 { .value = 6, .divider = 7, },
69 { .value = 7, .divider = 8, },
80 { .value = 1, .divider = 2, },
81 { .value = 3, .divider = 4, },
[all …]
/freebsd-14.2/sys/arm/mv/clk/
H A Da37x0_nb_periph_clk_driver.c50 { .value = 1, .divider = 1 },
51 { .value = 2, .divider = 2 },
52 { .value = 3, .divider = 3 },
53 { .value = 4, .divider = 4 },
54 { .value = 5, .divider = 5 },
55 { .value = 6, .divider = 6 },
56 { .value = 0, .divider = 0 }
60 { .value = 0, .divider = 1 },
61 { .value = 1, .divider = 2 },
62 { .value = 2, .divider = 4 },
[all …]
/freebsd-14.2/sys/contrib/device-tree/Bindings/iio/afe/
H A Dvoltage-divider.yaml4 $id: http://devicetree.org/schemas/iio/afe/voltage-divider.yaml#
7 title: Voltage divider
13 When an io-channel measures the midpoint of a voltage divider, the
15 of the divider. This binding describes the voltage divider in such
35 const: voltage-divider
48 Resistance R + Rout for the full divider. The io-channel is scaled by
64 * voltage divider (R = 200 Ohms, Rout = 22 Ohms) and fed to an ADC.
79 compatible = "voltage-divider";
H A Dvoltage-divider.txt1 Voltage divider
4 When an io-channel measures the midpoint of a voltage divider, the
6 of the divider. This binding describes the voltage divider in such
24 - compatible : "voltage-divider"
28 - full-ohms : Resistance R + Rout for the full divider. The io-channel
33 voltage divider (R = 200 Ohms, Rout = 22 Ohms) and fed to an ADC.
36 compatible = "voltage-divider";
/freebsd-14.2/sys/contrib/device-tree/Bindings/clock/ti/
H A Ddivider.txt1 Binding for TI divider clock
6 register-mapped adjustable clock rate divider that does not gate and has
44 The binding must also provide the register to control the divider and
45 unless the divider array is provided, min and max dividers. Optionally
56 - compatible : shall be "ti,divider-clock" or "ti,composite-divider-clock".
59 - reg : offset for register controlling adjustable divider
64 - ti,bit-shift : number of bits to shift the divider value, defaults to 0
85 compatible = "ti,divider-clock";
94 compatible = "ti,divider-clock";
103 compatible = "ti,composite-divider-clock";
[all …]
/freebsd-14.2/sys/contrib/device-tree/Bindings/clock/
H A Dxgene.txt37 reset and/or the divider. Either may be omitted, but at least
55 - divider-offset : Offset to the divider CSR register from the divider base.
57 - divider-width : Width of the divider register. Default is 0.
58 - divider-shift : Bit shift of the divider register. Default is 0.
107 divider-offset = <0x238>;
108 divider-width = <0x9>;
109 divider-shift = <0x0>;
125 divider-offset = <0x10>;
126 divider-width = <0x2>;
127 divider-shift = <0x0>;
H A Dkeystone-pll.txt4 a divider and a post divider. The additional PLL IPs like ARMPLL, DDRPLL
18 - reg-names : control, multiplier and post-divider. The multiplier and
19 post-divider registers are applicable only for main pll clock
20 - fixed-postdiv : fixed post divider value. If absent, use clkod register bits
29 reg-names = "control", "multiplier", "post-divider";
66 - compatible : shall be "ti,keystone,pll-divider-clock"
70 - bit-mask : arbitrary bitmask for programming the divider
78 compatible = "ti,keystone,pll-divider-clock";
H A Dnspire-clock.txt5 "lsi,nspire-cx-ahb-divider" for the AHB divider in the CX model
6 "lsi,nspire-classic-ahb-divider" for the AHB divider in the older model
14 - clocks: For the "nspire-*-ahb-divider" compatible clocks, this is the parent
H A Ddove-divider-clock.txt1 PLL divider based Dove clocks
17 - compatible : shall be "marvell,dove-divider-clock"
25 compatible = "marvell,dove-divider-clock";
/freebsd-14.2/sys/contrib/device-tree/Bindings/regulator/
H A Dltc3676.txt17 - lltc,fb-voltage-divider: An array of two integers containing the resistor
18 values R1 and R2 of the feedback voltage divider in ohms.
39 lltc,fb-voltage-divider = <127000 200000>;
48 lltc,fb-voltage-divider = <301000 200000>;
57 lltc,fb-voltage-divider = <127000 200000>;
66 lltc,fb-voltage-divider = <221000 200000>;
75 lltc,fb-voltage-divider = <487000 200000>;
89 lltc,fb-voltage-divider = <634000 200000>;
H A Dltc3589.txt17 - lltc,fb-voltage-divider: An array of two integers containing the resistor
18 values R1 and R2 of the feedback voltage divider in ohms.
39 lltc,fb-voltage-divider = <100000 158000>;
48 lltc,fb-voltage-divider = <180000 191000>;
57 lltc,fb-voltage-divider = <270000 100000>;
66 lltc,fb-voltage-divider = <511000 158000>;
74 lltc,fb-voltage-divider = <100000 158000>;
82 lltc,fb-voltage-divider = <180000 191000>;
H A Dmps,mp886x.yaml28 mps,fb-voltage-divider:
30 values R1 and R2 of the feedback voltage divider in kilo ohms.
42 - mps,fb-voltage-divider
58 mps,fb-voltage-divider = <80 240>;
H A Dmp886x.txt9 - mps,fb-voltage-divider: An array of two integers containing the resistor
10 values R1 and R2 of the feedback voltage divider in kilo ohms.
25 mps,fb-voltage-divider = <80 240>;
/freebsd-14.2/sys/contrib/device-tree/src/arm/
H A Ddm816x-clocks.dtsi95 compatible = "ti,divider-clock";
113 compatible = "ti,divider-clock";
121 compatible = "ti,divider-clock";
129 compatible = "ti,divider-clock";
137 compatible = "ti,divider-clock";
145 compatible = "ti,divider-clock";
153 compatible = "ti,divider-clock";
161 compatible = "ti,divider-clock";
169 compatible = "ti,divider-clock";
185 compatible = "ti,divider-clock";
H A Domap54xx-clocks.dtsi134 compatible = "ti,divider-clock";
153 compatible = "ti,divider-clock";
163 compatible = "ti,divider-clock";
182 compatible = "ti,divider-clock";
216 compatible = "ti,divider-clock";
244 compatible = "ti,divider-clock";
254 compatible = "ti,divider-clock";
264 compatible = "ti,divider-clock";
274 compatible = "ti,divider-clock";
284 compatible = "ti,divider-clock";
[all …]
H A Domap44xx-clocks.dtsi170 compatible = "ti,divider-clock";
191 compatible = "ti,divider-clock";
202 compatible = "ti,divider-clock";
238 compatible = "ti,divider-clock";
250 compatible = "ti,divider-clock";
271 compatible = "ti,divider-clock";
283 compatible = "ti,divider-clock";
292 compatible = "ti,divider-clock";
302 compatible = "ti,divider-clock";
312 compatible = "ti,divider-clock";
[all …]
H A Ddra7xx-clocks.dtsi244 compatible = "ti,divider-clock";
256 compatible = "ti,divider-clock";
266 compatible = "ti,divider-clock";
278 compatible = "ti,divider-clock";
314 compatible = "ti,divider-clock";
343 compatible = "ti,divider-clock";
392 compatible = "ti,divider-clock";
434 compatible = "ti,divider-clock";
476 compatible = "ti,divider-clock";
490 compatible = "ti,divider-clock";
[all …]
/freebsd-14.2/sys/contrib/device-tree/Bindings/spi/
H A Dspi_oc_tiny.txt8 - baud-width: width, in bits, of the programmable divider used to scale
11 The clock-frequency and baud-width properties are needed only if the divider
12 is programmable. They are not needed if the divider is fixed.
/freebsd-14.2/sys/arm/allwinner/clkng/
H A Dccu_a31.c432 { .value = 0, .divider = 1, },
433 { .value = 1, .divider = 2, },
434 { .value = 2, .divider = 3, },
435 { .value = 3, .divider = 4, },
436 { .value = 4, .divider = 4, },
437 { .value = 5, .divider = 4, },
438 { .value = 6, .divider = 4, },
439 { .value = 7, .divider = 4, },
468 { .value = 0, .divider = 2, },
469 { .value = 1, .divider = 2, },
[all …]
/freebsd-14.2/sys/arm/nvidia/tegra124/
H A Dtegra124_clk_per.c531 uint32_t divider; member
568 sc->divider = 1; in periph_init()
571 sc->divider = 2; in periph_init()
640 uint64_t tmp, divider; in periph_set_freq() local
649 divider = tmp / *fout; in periph_set_freq()
651 divider++; in periph_set_freq()
653 if (divider < (1 << sc->div_f_width)) in periph_set_freq()
654 divider = 1 << (sc->div_f_width - 1); in periph_set_freq()
658 (*fout != (tmp / divider))) in periph_set_freq()
665 sc->divider = divider; in periph_set_freq()
[all …]
/freebsd-14.2/sys/contrib/device-tree/Bindings/hwmon/
H A Dmaxim,max20730.yaml36 vout-voltage-divider:
38 If voltage divider present at vout, the voltage at voltage sensor pin
40 meaningful number if voltage divider present. It has two numbers,
63 vout-voltage-divider = <1000 2000>; // vout would be scaled to 0.5
/freebsd-14.2/sys/contrib/device-tree/Bindings/net/can/
H A Dmpc5xxx-mscan.txt21 also specify which clock source and divider shall be used for the controller:
32 - fsl,mscan-clock-divider: for the reference and system clock, an additional
33 clock divider can be specified. By default, a
52 fsl,mscan-clock-divider = <3>;
/freebsd-14.2/sys/contrib/device-tree/Bindings/iio/adc/
H A Dingenic,adc.yaml48 ingenic,use-internal-divider:
51 internal 1/4 divider. If absent, it is read through the VBAT_ER pin,
52 which does not have such a divider.
63 ingenic,use-internal-divider: false
/freebsd-14.2/sys/contrib/device-tree/Bindings/sound/
H A Dmt8186-afe-pcm.yaml60 - description: i2s0_mck divider
61 - description: i2s1_mck divider
62 - description: i2s2_mck divider
63 - description: i2s4_mck divider
64 - description: tdm_mck divider

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