Home
last modified time | relevance | path

Searched refs:constrainSelectedInstRegOperands (Results 1 – 16 of 16) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsInstructionSelector.cpp152 return constrainSelectedInstRegOperands(*Inst, TII, TRI, RBI); in materialize32BitImm()
158 return constrainSelectedInstRegOperands(*Inst, TII, TRI, RBI); in materialize32BitImm()
165 return constrainSelectedInstRegOperands(*Inst, TII, TRI, RBI); in materialize32BitImm()
173 if (!constrainSelectedInstRegOperands(*LUi, TII, TRI, RBI)) in materialize32BitImm()
175 if (!constrainSelectedInstRegOperands(*ORi, TII, TRI, RBI)) in materialize32BitImm()
266 if (!constrainSelectedInstRegOperands(*NewInst, TII, TRI, RBI)) in buildUnalignedStore()
305 if (!constrainSelectedInstRegOperands(*Mul, TII, TRI, RBI)) in select()
378 if (!constrainSelectedInstRegOperands(*SLL, TII, TRI, RBI)) in select()
386 if (!constrainSelectedInstRegOperands(*ADDu, TII, TRI, RBI)) in select()
397 if (!constrainSelectedInstRegOperands(*LW, TII, TRI, RBI)) in select()
[all …]
H A DMipsLegalizerInfo.cpp519 return constrainSelectedInstRegOperands(*Trap, TII, TRI, RBI); in legalizeIntrinsic()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstructionSelector.cpp584 if (!constrainSelectedInstRegOperands(*CmpI, TII, TRI, RBI)) in insertComparison()
592 if (!constrainSelectedInstRegOperands(*ReadI, TII, TRI, RBI)) in insertComparison()
603 if (!constrainSelectedInstRegOperands(*Mov1I, TII, TRI, RBI)) in insertComparison()
709 return constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI); in selectGlobal()
716 return constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI); in selectGlobal()
764 return constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI); in selectGlobal()
781 if (!constrainSelectedInstRegOperands(*CmpI, TII, TRI, RBI)) in selectSelect()
797 if (!constrainSelectedInstRegOperands(*Mov1I, TII, TRI, RBI)) in selectSelect()
810 return constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI); in selectShift()
1129 if (!constrainSelectedInstRegOperands(*Test, TII, TRI, RBI)) in select()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64InstructionSelector.cpp1915 constrainSelectedInstRegOperands(*Shl, TII, TRI, RBI); in selectVectorSHL()
1972 constrainSelectedInstRegOperands(*Neg, TII, TRI, RBI); in selectVectorAshrLshr()
1974 constrainSelectedInstRegOperands(*SShl, TII, TRI, RBI); in selectVectorAshrLshr()
2006 constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI); in selectVaStartDarwin()
2014 constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI); in selectVaStartDarwin()
2030 constrainSelectedInstRegOperands(*MovZ, TII, TRI, RBI); in materializeLargeCMVal()
2722 constrainSelectedInstRegOperands(I, TII, TRI, RBI); in select()
3417 constrainSelectedInstRegOperands(I, TII, TRI, RBI); in select()
3869 constrainSelectedInstRegOperands(*Cmp, TII, TRI, RBI); in selectVectorICmp()
4001 constrainSelectedInstRegOperands(BFM, TII, TRI, RBI); in selectMergeValues()
[all …]
H A DAArch64LegalizerInfo.cpp1648 constrainSelectedInstRegOperands(*NewI, *ST->getInstrInfo(), in legalizeLoadStore()
1932 constrainSelectedInstRegOperands(*CAS, *ST->getInstrInfo(), in legalizeAtomicCmpxchg128()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVInstructionSelector.cpp617 return constrainSelectedInstRegOperands(*Bcc, TII, TRI, RBI); in select()
674 return constrainSelectedInstRegOperands(MI, TII, TRI, RBI); in select()
683 return constrainSelectedInstRegOperands(MI, TII, TRI, RBI); in select()
724 return constrainSelectedInstRegOperands(MI, TII, TRI, RBI); in selectMergeValues()
740 return constrainSelectedInstRegOperands(MI, TII, TRI, RBI); in selectUnmergeValues()
946 if (!constrainSelectedInstRegOperands(*Result, TII, TRI, RBI)) in materializeImm()
980 return constrainSelectedInstRegOperands(MI, TII, TRI, RBI); in selectAddr()
998 if (!constrainSelectedInstRegOperands(*Result, TII, TRI, RBI)) in selectAddr()
1019 if (!constrainSelectedInstRegOperands(*AddrHi, TII, TRI, RBI)) in selectAddr()
1063 return constrainSelectedInstRegOperands(MI, TII, TRI, RBI); in selectAddr()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/GISel/
H A DX86InstructionSelector.cpp597 return constrainSelectedInstRegOperands(I, TII, TRI, RBI); in selectLoadStoreOp()
634 return constrainSelectedInstRegOperands(I, TII, TRI, RBI); in selectFrameIndexOrGep()
680 return constrainSelectedInstRegOperands(I, TII, TRI, RBI); in selectGlobalValue()
880 constrainSelectedInstRegOperands(AndInst, TII, TRI, RBI); in selectZext()
985 constrainSelectedInstRegOperands(CmpInst, TII, TRI, RBI); in selectCmp()
986 constrainSelectedInstRegOperands(SetInst, TII, TRI, RBI); in selectCmp()
1053 constrainSelectedInstRegOperands(Set1, TII, TRI, RBI); in selectFCmp()
1054 constrainSelectedInstRegOperands(Set2, TII, TRI, RBI); in selectFCmp()
1055 constrainSelectedInstRegOperands(Set3, TII, TRI, RBI); in selectFCmp()
1077 constrainSelectedInstRegOperands(CmpInst, TII, TRI, RBI); in selectFCmp()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstructionSelector.cpp314 return constrainSelectedInstRegOperands(I, TII, TRI, RBI); in selectG_AND_OR_XOR()
348 return constrainSelectedInstRegOperands(I, TII, TRI, RBI); in selectG_ADD_SUB()
402 if (!constrainSelectedInstRegOperands(*Addc, TII, TRI, RBI)) in selectG_ADD_SUB()
439 return constrainSelectedInstRegOperands(I, TII, TRI, RBI); in selectG_UADDO_USUBO_UADDE_USUBE()
495 return constrainSelectedInstRegOperands(I, TII, TRI, RBI); in selectG_AMDGPU_MAD_64_32()
711 if (!constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI)) in selectG_BUILD_VECTOR()
718 if (!constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI)) in selectG_BUILD_VECTOR()
774 return constrainSelectedInstRegOperands(MI, TII, TRI, RBI); in selectG_BUILD_VECTOR()
876 return constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI); in selectG_SBFX_UBFX()
978 return constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI); in selectWritelane()
[all …]
H A DAMDGPURegisterBankInfo.cpp1547 if (!constrainSelectedInstRegOperands(*MIB, *TII, *TRI, *this)) in applyMappingBFE()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/
H A DPPCInstructionSelector.cpp208 return constrainSelectedInstRegOperands(*MI, TII, TRI, RBI); in selectIntToFP()
238 return constrainSelectedInstRegOperands(*MI, TII, TRI, RBI); in selectFPToInt()
272 return constrainSelectedInstRegOperands(*MI, TII, TRI, RBI); in selectZExt()
705 return constrainSelectedInstRegOperands(*MI, TII, TRI, RBI); in selectConstantPool()
763 return constrainSelectedInstRegOperands(*LoadStore, TII, TRI, RBI); in select()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVGlobalRegistry.cpp191 constrainSelectedInstRegOperands(*MIB, *ST.getInstrInfo(), in getOrCreateConstInt()
235 constrainSelectedInstRegOperands(*MIB, *Subtarget.getInstrInfo(), in buildConstantInt()
306 constrainSelectedInstRegOperands(*MIB, *Subtarget.getInstrInfo(), in getOrCreateIntCompositeOrNull()
505 constrainSelectedInstRegOperands(*MIB, *Subtarget.getInstrInfo(), in buildGlobalVariable()
1179 constrainSelectedInstRegOperands(*MIB, *ST.getInstrInfo(), in getOrCreateUndef()
H A DSPIRVInstructionSelector.cpp245 return constrainSelectedInstRegOperands(I, TII, TRI, RBI); in select()
1069 constrainSelectedInstRegOperands(*MI, TII, TRI, RBI); in buildI32Constant()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DUtils.h143 bool constrainSelectedInstRegOperands(MachineInstr &I,
H A DGIMatchTableExecutorImpl.h1357 constrainSelectedInstRegOperands(*OutMIs[InsnID].getInstr(), TII, TRI, in executeMatchTable()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DMachineInstrBuilder.h335 return constrainSelectedInstRegOperands(*MI, TII, TRI, RBI); in constrainAllUses()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DUtils.cpp153 bool llvm::constrainSelectedInstRegOperands(MachineInstr &I, in constrainSelectedInstRegOperands() function in llvm