Searched refs:buildRegSequence (Results 1 – 2 of 2) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.cpp | 3109 static MachineSDNode *buildRegSequence(SmallVectorImpl<SDValue> &Elts, in buildRegSequence() function
3134 Src = SDValue(buildRegSequence(Elts, CurDAG, DL, ElementSize), 0); in selectWMMAModsNegAbs()
3138 Src = SDValue(buildRegSequence(NegAbsElts, CurDAG, DL, ElementSize), 0); in selectWMMAModsNegAbs()
3144 Src = SDValue(buildRegSequence(Elts, CurDAG, DL, ElementSize), 0); in selectWMMAModsNegAbs()
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| H A D | AMDGPUInstructionSelector.cpp | 3959 static Register buildRegSequence(SmallVectorImpl<Register> &Elts, in buildRegSequence() function
4003 Src = buildRegSequence(Elts, InsertPt, MRI); in selectWMMAModsNegAbs()
4007 Src = buildRegSequence(NegAbsElts, InsertPt, MRI); in selectWMMAModsNegAbs()
4013 Src = buildRegSequence(Elts, InsertPt, MRI); in selectWMMAModsNegAbs()
4065 Src = buildRegSequence(EltsV2F16, Root.getParent(), *MRI); in selectWMMAModsF16Neg()
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