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Searched refs:buildConstant (Results 1 – 25 of 29) sorted by relevance

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/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DLegalizerHelper.cpp1243 auto K = MIRBuilder.buildConstant( in narrowScalar()
3088 auto OffsetMask = B.buildConstant( in getBitcastWiderVectorElementOffset()
3217 auto EltMask = B.buildConstant( in buildBitFieldInsert()
3518 auto OffsetCst = MIRBuilder.buildConstant( in lowerStore()
4966 Lo = MIRBuilder.buildConstant(NVT, 0); in narrowScalarShiftByConstant()
4970 Lo = MIRBuilder.buildConstant(NVT, 0); in narrowScalarShiftByConstant()
6159 auto C_1 = B.buildConstant(Ty, 1); in lowerBitCount()
6168 auto C_2 = B.buildConstant(Ty, 2); in lowerBitCount()
6181 auto C_4 = B.buildConstant(Ty, 4); in lowerBitCount()
7786 MIRBuilder.buildConstant(DstReg, 0); in lowerISFPCLASS()
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H A DCSEMIRBuilder.cpp215 return buildConstant(DstOps[0], *Cst); in buildInstr()
246 return buildConstant(Dst, *MaybeCst); in buildInstr()
266 return buildConstant(DstOps[0], (*MaybeCsts)[0]); in buildInstr()
272 buildConstant(VecTy.getScalarType(), Cst).getReg(0)); in buildInstr()
303 MachineInstrBuilder CSEMIRBuilder::buildConstant(const DstOp &Res, in buildConstant() function in CSEMIRBuilder
307 return MachineIRBuilder::buildConstant(Res, Val); in buildConstant()
312 return buildSplatVector(Res, buildConstant(Ty.getElementType(), Val)); in buildConstant()
326 MachineInstrBuilder NewMIB = MachineIRBuilder::buildConstant(Res, Val); in buildConstant()
H A DCombinerHelper.cpp1458 auto True = Builder.buildConstant( in applyOptBrCondByInvertingCond()
2052 Builder.buildConstant(DstReg, Csts[Idx]); in applyCombineUnmergeConstant()
2369 Builder.buildConstant(Dst, NewCst); in applyCombineConstPtrAddToI2P()
2867 Builder.buildConstant(MI.getOperand(0), C); in replaceInstWithConstant()
3139 auto Zero = B.buildConstant(Ty, 0); in matchOverlappingAnd()
4479 B.buildConstant(Dst, 0); in matchBitfieldExtractFromShrAnd()
4925 B.buildConstant(Dst, 0); in matchMulOBy0()
4926 B.buildConstant(Carry, 0); in matchMulOBy0()
4944 B.buildConstant(Carry, 0); in matchAddOBy0()
5074 MIB.buildConstant(ScalarTy, in buildUDivUsingMul()
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H A DMachineIRBuilder.cpp221 auto Cst = buildConstant(ValueTy, Value); in materializePtrAdd()
231 buildConstant(MaskReg, maskTrailingZeros<uint64_t>(NumBits)); in buildMaskLowPtrBits()
310 MachineInstrBuilder MachineIRBuilder::buildConstant(const DstOp &Res, in buildConstant() function in MachineIRBuilder
334 MachineInstrBuilder MachineIRBuilder::buildConstant(const DstOp &Res, in buildConstant() function in MachineIRBuilder
339 return buildConstant(Res, *CI); in buildConstant()
371 MachineInstrBuilder MachineIRBuilder::buildConstant(const DstOp &Res, in buildConstant() function in MachineIRBuilder
374 return buildConstant(Res, *CI); in buildConstant()
443 auto ConstOffset = buildConstant(OffsetTy, Offset); in buildLoadFromOffset()
569 auto Mask = buildConstant( in buildZExtInReg()
705 TmpVec.push_back(buildConstant(EltTy, Op)); in buildBuildVectorConstant()
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H A DIRTranslator.cpp866 auto FirstCst = MIB.buildConstant(SwitchTy, JTH.First); in emitJumpTableHeader()
954 auto Diff = MIB.buildConstant(CmpTy, High - Low); in emitSwitchCase()
1131 auto RangeCst = MIB.buildConstant(SwitchOpTy, B.Range); in emitBitTestHeader()
1169 auto CstOne = MIB.buildConstant(SwitchTy, 1); in emitBitTestCase()
1173 auto CstMask = MIB.buildConstant(SwitchTy, B.Mask); in emitBitTestCase()
1175 auto CstZero = MIB.buildConstant(SwitchTy, 0); in emitBitTestCase()
1657 auto ElementSizeMIB = MIRBuilder.buildConstant( in translateGetElementPtr()
1670 MIRBuilder.buildConstant(OffsetTy, Offset); in translateGetElementPtr()
2235 MIRBuilder.buildConstant(Reg, TypeID); in translateKnownIntrinsic()
3306 EntryBuilder->buildConstant(Reg, *CI); in translate()
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H A DLoadStoreOpt.cpp401 WideReg = Builder.buildConstant(WideValueTy, WideConst).getReg(0); in doSingleStoreMerge()
876 Builder.buildConstant(WideStoreTy, WideStoreTy.getSizeInBits() / 2); in mergeTruncStore()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64PreLegalizerCombiner.cpp69 MIB.buildConstant(MI.getOperand(0).getReg(), ImmValAPF.bitcastToAPInt()); in applyFConstantToConstant()
114 auto WideZero = Builder.buildConstant(WideTy, 0); in applyICmpRedundantTrunc()
229 B.buildConstant(LLT::scalar(64), -static_cast<int64_t>(MinOffset))); in applyFoldGlobalOffset()
308 Ext2SrcReg = Builder.buildConstant(MRI.getType(Ext1SrcReg), 1) in applyExtAddvToUdotAddv()
330 auto Zeroes = Builder.buildConstant(MidTy, 0)->getOperand(0).getReg(); in applyExtAddvToUdotAddv()
355 Register v8Zeroes = Builder.buildConstant(LLT::fixed_vector(8, 8), 0) in applyExtAddvToUdotAddv()
392 auto Zeroes = Builder.buildConstant(ZeroesLLT, 0)->getOperand(0).getReg(); in applyExtAddvToUdotAddv()
494 Register zeroReg = B.buildConstant(LLT::scalar(64), 0).getReg(0); in applyExtUaddvToUaddlv()
651 B.buildConstant(LLT::scalar(32), OpTySize == 8 ? 1 << 8 : 1 << 16)); in tryToSimplifyUADDO()
653 B.buildConstant(LLT::scalar(32), 0)); in tryToSimplifyUADDO()
H A DAArch64PostLegalizerCombiner.cpp119 auto Elt0 = B.buildExtractVectorElement(Ty, Src, B.buildConstant(s64, 0)); in applyExtractVecEltPairwiseAdd()
120 auto Elt1 = B.buildExtractVectorElement(Ty, Src, B.buildConstant(s64, 1)); in applyExtractVecEltPairwiseAdd()
226 auto Shift = B.buildConstant(LLT::scalar(64), ShiftAmt); in matchAArch64MulConstCombine()
236 B.buildSub(DstReg, B.buildConstant(Ty, 0), Res); in matchAArch64MulConstCombine()
241 B.buildShl(DstReg, Res, B.buildConstant(LLT::scalar(64), TrailingZeroes)); in matchAArch64MulConstCombine()
332 auto Zero = B.buildConstant(NewTy, 0); in applySplitStoreZero128()
334 B.buildConstant(LLT::scalar(64), 8)); in applySplitStoreZero128()
547 auto NewOff = MIB.buildConstant(LLT::scalar(64), SInfo.Offset - BaseOffset); in tryOptimizeConsecStores()
H A DAArch64PostLegalizerLowering.cpp464 MIRBuilder.buildConstant(LLT::scalar(32), MatchInfo.SrcOps[2].getImm()); in applyEXT()
518 auto SrcCst = Builder.buildConstant(LLT::scalar(64), SrcLane); in applyINS()
520 auto DstCst = Builder.buildConstant(LLT::scalar(64), DstLane); in applyINS()
558 auto ImmDef = MIB.buildConstant(LLT::scalar(32), Imm); in applyVAshrLshrImm()
686 auto Cst = MIB.buildConstant(MRI.cloneVirtualRegister(RHS.getReg()), in applyAdjustICmpImmAndPred()
757 auto Lane = B.buildConstant(LLT::scalar(64), MatchInfo.second); in applyDupLane()
H A DAArch64LegalizerInfo.cpp1275 auto Cast64 = MIRBuilder.buildConstant(LLT::scalar(64), Amount.zext(64)); in legalizeFunnelShift()
1394 MIB.buildConstant(MI.getOperand(0).getReg(), 0); in legalizeIntrinsic()
1492 MIB.buildConstant(LLT::scalar(64), 0)->getOperand(0).getReg(); in legalizeIntrinsic()
1562 auto ExtCst = MIRBuilder.buildConstant(LLT::scalar(64), Amount); in legalizeShlAshrLshr()
1699 MIRBuilder.buildConstant(IntPtrTy, Alignment.value() - 1); in legalizeVaArg()
1712 auto Size = MIRBuilder.buildConstant(IntPtrTy, alignTo(ValSize, PtrAlign)); in legalizeVaArg()
2007 auto Zero = MIRBuilder.buildConstant(DstTy, 0); in legalizeFCopySign()
2014 auto Mask = MIRBuilder.buildConstant(VecTy, EltMask); in legalizeFCopySign()
H A DAArch64CallLowering.cpp267 auto OffsetReg = MIRBuilder.buildConstant(s64, Offset); in getStackAddress()
580 MIRBuilder.buildConstant(MRI.createGenericVirtualRegister(s64), 8); in saveVarArgRegisters()
610 MIRBuilder.buildConstant(MRI.createGenericVirtualRegister(s64), 16); in saveVarArgRegisters()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DCSEMIRBuilder.h98 using MachineIRBuilder::buildConstant;
100 MachineInstrBuilder buildConstant(const DstOp &Res,
H A DLegalizationArtifactCombiner.h102 Builder.buildConstant( in tryCombineAnyExt()
152 auto Mask = Builder.buildConstant(DstTy, ExtMaskVal); in tryCombineZExt()
177 Builder.buildConstant( in tryCombineZExt()
233 Builder.buildConstant( in tryCombineSExt()
261 Builder.buildConstant( in tryCombineTrunc()
389 Builder.buildConstant(DstReg, 0); in tryFoldImplicitDef()
H A DMachineIRBuilder.h849 virtual MachineInstrBuilder buildConstant(const DstOp &Res,
860 MachineInstrBuilder buildConstant(const DstOp &Res, int64_t Val);
861 MachineInstrBuilder buildConstant(const DstOp &Res, const APInt &Val);
1244 buildConstant(LLT::scalar(64), Idx)); in buildExtractVectorElementConstant()
1711 auto NegOne = buildConstant(Dst.getLLTTy(*getMRI()), -1); in buildNot()
1719 auto Zero = buildConstant(Dst.getLLTTy(*getMRI()), 0); in buildNeg()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPULegalizerInfo.cpp2489 auto One = B.buildConstant(S32, 1); in legalizeITOFP()
4225 B.buildConstant(DstReg, 0); in loadInputValue()
4380 auto One = B.buildConstant(S32, 1); in legalizeUnsignedDIV_REM32Impl()
4454 auto Zero64 = B.buildConstant(S64, 0); in legalizeUnsignedDIV_REM64Impl()
4474 auto Zero32 = B.buildConstant(S32, 0); in legalizeUnsignedDIV_REM64Impl()
4516 auto One64 = B.buildConstant(S64, 1); in legalizeUnsignedDIV_REM64Impl()
5114 auto PosOne = B.buildConstant(I32, 1); in legalizeFSQRTF32()
5193 auto ZeroInt = B.buildConstant(S32, 0); in legalizeFSQRTF64()
5422 B.buildConstant(DstReg, *KnownSize); in getLDSKernelId()
6894 auto LSB = B.buildConstant(S32, 25); in legalizeWaveID()
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H A DAMDGPURegisterBankInfo.cpp143 auto False = B.buildConstant(S32, 0); in applyBank()
1325 SOffsetReg = B.buildConstant(S32, 0).getReg(0); in setBufferOffsets()
1488 auto Zero = B.buildConstant(S32, 0); in applyMappingBFE()
1628 Zero = B.buildConstant(S32, 0).getReg(0); in applyMappingMAD_64_32()
1837 BaseReg = B.buildConstant(S32, 0).getReg(0); in splitBufferOffsets()
1904 B.buildConstant(Hi32Reg, 0); in extendLow32IntoHigh32()
1976 auto IC = B.buildConstant(S32, I); in foldExtractEltToCmpSelect()
2077 auto IC = B.buildConstant(S32, I); in foldInsertEltToCmpSelect()
2768 auto False = B.buildConstant(SelType, 0); in applyMappingImpl()
2865 auto One = B.buildConstant(S32, 1); in applyMappingImpl()
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H A DAMDGPUPreLegalizerCombiner.cpp200 auto MinBoundaryDst = B.buildConstant(S32, MinBoundary); in applyClampI64ToI16()
201 auto MaxBoundaryDst = B.buildConstant(S32, MaxBoundary); in applyClampI64ToI16()
H A DAMDGPUCallLowering.cpp226 auto OffsetReg = MIRBuilder.buildConstant(S32, Offset); in getStackAddress()
409 auto OffsetReg = B.buildConstant(LLT::scalar(64), Offset); in lowerParameterPtr()
830 MIRBuilder.buildConstant(InputReg, *Id); in passSpecialInputs()
893 InputReg = MIRBuilder.buildConstant(S32, 0).getReg(0); in passSpecialInputs()
903 Y = MIRBuilder.buildShl(S32, Y, MIRBuilder.buildConstant(S32, 10)).getReg(0); in passSpecialInputs()
913 Z = MIRBuilder.buildShl(S32, Z, MIRBuilder.buildConstant(S32, 20)).getReg(0); in passSpecialInputs()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsLegalizerInfo.cpp380 auto C_P2HalfMemSize = MIRBuilder.buildConstant(s32, P2HalfMemSize); in legalizeCustom()
385 auto C_P2Half_InBits = MIRBuilder.buildConstant(s32, P2HalfMemSize * 8); in legalizeCustom()
409 auto C_P2HalfMemSize = MIRBuilder.buildConstant(s32, P2HalfMemSize); in legalizeCustom()
445 auto C_HiMask = MIRBuilder.buildConstant(s32, UINT32_C(0x43300000)); in legalizeCustom()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVLegalizerInfo.cpp431 auto ExtCst = MIRBuilder.buildConstant(LLT::scalar(64), Amount); in legalizeShlAshrLshr()
487 auto FClassMask = MIB.buildConstant(sXLen, GFpClassImm.rotr(2).zext(XLen)); in legalizeCustom()
488 auto ConstZero = MIB.buildConstant(sXLen, 0); in legalizeCustom()
H A DRISCVCallLowering.cpp77 auto OffsetReg = MIRBuilder.buildConstant(sXLen, Offset); in getStackAddress()
468 auto Offset = MIRBuilder.buildConstant( in saveVarArgRegisters()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMLegalizerInfo.cpp416 MIRBuilder.buildConstant(OriginalResult, in legalizeCustom()
454 auto Zero = MIRBuilder.buildConstant(LLT::scalar(32), 0); in legalizeCustom()
470 MIRBuilder.buildConstant(MI.getOperand(0), in legalizeCustom()
H A DARMCallLowering.cpp104 auto OffsetReg = MIRBuilder.buildConstant(s32, Offset); in getStackAddress()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/M68k/GISel/
H A DM68kCallLowering.cpp84 auto OffsetReg = MIRBuilder.buildConstant(SType, Offset); in getStackAddress()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/GISel/
H A DX86CallLowering.cpp100 auto OffsetReg = MIRBuilder.buildConstant(SType, Offset); in getStackAddress()

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