Home
last modified time | relevance | path

Searched refs:bitsGE (Results 1 – 14 of 14) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DValueTypes.h275 bool bitsGE(EVT VT) const { in bitsGE() function
H A DMachineValueType.h407 bool bitsGE(MVT VT) const { in bitsGE() function
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeFloatTypes.cpp868 if (NVT.bitsGE(SVT)) in SoftenFloatRes_XINT_TO_FP()
1039 if (Promoted.bitsGE(RetVT)) in findFPToIntLibcall()
H A DLegalizeDAG.cpp414 (EltVT.isInteger() && Val.getValueType().bitsGE(EltVT))) { in ExpandINSERT_VECTOR_ELT()
4682 if (NVT.bitsGE(SVT)) in ConvertNodeToLibcall()
4725 if (NVT.bitsGE(RVT)) in ConvertNodeToLibcall()
H A DLegalizeIntegerTypes.cpp714 if (SVT.bitsGE(NVT)) { in PromoteIntRes_EXTRACT_VECTOR_ELT()
2494 if (ResVT.bitsGE(EltVT)) in PromoteIntOp_VECREDUCE()
2523 if (VT.bitsGE(EltVT)) in PromoteIntOp_VP_REDUCE()
H A DSelectionDAGBuilder.cpp705 PartEVT.getVectorElementType().bitsGE( in getCopyToPartsVector()
8070 assert(EVLParamVT.isScalarInteger() && EVLParamVT.bitsGE(MVT::i32) && in visitVPCmp()
8098 assert(EVLParamVT.isScalarInteger() && EVLParamVT.bitsGE(MVT::i32) && in visitVectorPredicationIntrinsic()
H A DSelectionDAG.cpp7566 assert(NVT.bitsGE(VT)); in getMemcpyLoadsAndStores()
11663 assert(CVT.bitsGE(VecEltVT) && "Illegal splat_vector element extension"); in isConstOrConstSplat()
11679 assert(CVT.bitsGE(NSVT) && "Illegal build vector element extension"); in isConstOrConstSplat()
H A DDAGCombiner.cpp6569 ExtVT.bitsGE(Load->getMemoryVT())) in SearchForAndLoads()
6590 if (ExtVT.bitsGE(VT)) in SearchForAndLoads()
21791 MaxEltVT = MaxEltVT.bitsGE(EltVT) ? MaxEltVT : EltVT; in visitINSERT_VECTOR_ELT()
27051 if (!isNullConstant(N3) || !XType.bitsGE(AType)) in foldSelectCCToShiftAnd()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600ISelLowering.cpp1190 } else if (Ptr->getOpcode() != AMDGPUISD::DWORDADDR && VT.bitsGE(MVT::i32)) { in LowerSTORE()
H A DAMDGPUISelLowering.cpp3870 if (SrcVT.bitsGE(ExtVT)) { in performAssertSZExtCombine()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp2350 if (LaneT.bitsGE(MVT::i32)) in unrollVectorShift()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp12994 cast<VTSDNode>(N->getOperand(1))->getVT().bitsGE(MVT::i16)) in performSIGN_EXTEND_INREGCombine()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp48999 if (!N->hasOneUse() || !N->getSimpleValueType(0).bitsGE(MVT::i32) || in combineOrCmpEqZeroToCtlzSrl()
49009 N->getOperand(1).getValueType().bitsGE(MVT::i32); in combineOrCmpEqZeroToCtlzSrl()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp26448 if (VT.bitsGE(SrcVT)) { in LowerFixedLengthIntToFPToSVE()