Searched refs:b2b_off (Results 1 – 2 of 2) sorted by relevance
106 uint64_t b2b_off; /* Offset in shared window. */ member409 sc->b2b_off = mw->mw_size / 2; in ntb_plx_attach()411 sc->b2b_off = 0; in ntb_plx_attach()426 } else if (sc->split > 0 && (sc->b2b_mw == 0 && sc->b2b_off == 0)) { in ntb_plx_attach()618 if (sc->b2b_mw >= 0 && sc->b2b_off == 0) in ntb_plx_mw_count()652 KASSERT(sc->b2b_off != 0, in ntb_plx_mw_get_range()654 off = sc->b2b_off; in ntb_plx_mw_get_range()716 off = (mw_idx == sc->b2b_mw) ? sc->b2b_off : 0; in ntb_plx_mw_set_trans_internal()857 KASSERT(sc->b2b_off != 0, in ntb_plx_mw_set_wc()859 off = sc->b2b_off; in ntb_plx_mw_set_wc()
238 uint64_t b2b_off; member1936 if (ntb->b2b_off != 0) in xeon_reset_sbar_size()1955 if (ntb->b2b_off) in xeon_set_sbar_base_and_limit()1956 bar_addr += ntb->b2b_off; in xeon_set_sbar_base_and_limit()2008 ntb->b2b_off = 0; in xeon_setup_b2b_mw()2019 ntb->b2b_off = bar_size >> 1; in xeon_setup_b2b_mw()2021 ntb->b2b_off = 0; in xeon_setup_b2b_mw()2559 CTLFLAG_RD, &ntb->b2b_off, in intel_ntb_sysctl_init()3176 KASSERT(ntb->b2b_off != 0, in intel_ntb_mw_get_range()3178 bar_b2b_off = ntb->b2b_off; in intel_ntb_mw_get_range()[all …]