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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SystemOperands.td257 def : PRFM<"pld", 0b00, "l3", 0b10, "keep", 0b0>;
258 def : PRFM<"pld", 0b00, "l3", 0b10, "strm", 0b1>;
267 def : PRFM<"pli", 0b01, "l3", 0b10, "keep", 0b0>;
268 def : PRFM<"pli", 0b01, "l3", 0b10, "strm", 0b1>;
273 def : PRFM<"pst", 0b10, "l1", 0b00, "keep", 0b0>;
274 def : PRFM<"pst", 0b10, "l1", 0b00, "strm", 0b1>;
275 def : PRFM<"pst", 0b10, "l2", 0b01, "keep", 0b0>;
277 def : PRFM<"pst", 0b10, "l3", 0b10, "keep", 0b0>;
278 def : PRFM<"pst", 0b10, "l3", 0b10, "strm", 0b1>;
1741 def : ROSysReg<"BRBTGT"#n#"_EL1", 0b10, 0b001, 0b1000, nb{3-0}, {nb{4},0b10}>;
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H A DAArch64SMEInstrInfo.td309 defm BFMLAL_MZZI : sme2_mla_long_array_index<"bfmlal", 0b10, 0b10, nxv8bf16, int_aarch64_sm…
346 defm UMLAL_VG2_M2ZZI : sme2_int_mla_long_array_vg2_index<"umlal", 0b10, int_aarch64_sme_umlal_lane…
347 defm UMLAL_VG4_M4ZZI : sme2_int_mla_long_array_vg4_index<"umlal", 0b10, int_aarch64_sme_umlal_lane…
349 defm UMLAL_VG2_M2ZZ : sme2_int_mla_long_array_vg2_single<"umlal", 0b10, int_aarch64_sme_umlal_sing…
351 defm UMLAL_VG2_M2Z2Z : sme2_int_mla_long_array_vg2_multi<"umlal", 0b10, int_aarch64_sme_umlal_vg2x…
352 defm UMLAL_VG4_M4Z4Z : sme2_int_mla_long_array_vg4_multi<"umlal", 0b10, int_aarch64_sme_umlal_vg2x…
894 defm F2CVT_2ZZ_BtoH : sme2p1_fp8_cvt_vector_vg2_single<"f2cvt", 0b10, 0b0>;
895 defm F2CVTL_2ZZ_BtoH : sme2p1_fp8_cvt_vector_vg2_single<"f2cvtl", 0b10, 0b1>;
939 defm FMLAL_VG2_M2ZZI_BtoH : sme2_multi_vec_array_vg2_index_16b<"fmlal", 0b10, 0b111>;
940 defm FMLAL_VG4_M4ZZI_BtoH : sme2_multi_vec_array_vg4_index_16b<"fmlal", 0b10, 0b110>;
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H A DAArch64SVEInstrInfo.td503 defm EOR_ZZZ : sve_int_bin_cons_log<0b10, "eor", xor>;
557 defm AND_ZI : sve_int_log_imm<0b10, "and", "bic", and>;
901 defm BRKPAS_PPzPP : sve_int_brkp<0b10, "brkpas", null_frag>;
962 defm LD1W_Q_IMM : sve_mem_128b_cld_si<0b10, "ld1w">;
983 defm LD1RW_IMM : sve_mem_ld_dup<0b10, 0b10, "ld1rw", Z_s, ZPR32, uimm6s4>;
1342 defm ST1W_IMM : sve_mem_cst_si<0b10, 0b10, "st1w", Z_s, ZPR32>;
1553 defm ST3W_IMM : sve_mem_est_si<0b10, 0b10, ZZZ_s, "st3w", simm4s3>;
1572 def ST3W : sve_mem_est_ss<0b10, 0b10, ZZZ_s, "st3w", GPR64NoXZRshifted32>;
1603 defm PRFW_PRI : sve_mem_prfm_si<0b10, "prfw">;
4129 defm BF1CVT_ZZ : sve2_fp8_cvt_single<0b0, 0b10, "bf1cvt">;
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H A DSVEInstrFormats.td1048 let Inst{15-14} = 0b10;
1084 let Inst{21-20} = 0b10;
1451 def _S : sve_int_perm_tbl<0b10, 0b10, asm, ZPR32, Z_s>;
2823 let Inst{15-14} = 0b10;
3190 def _S : sve_int_bin_pred_arit_log<0b10, 0b10, opc, asm, ZPR32>,
3208 def _S : sve_int_bin_pred_arit_log<0b10, 0b10, opc, asm, ZPR32>,
3792 let Inst{15-14} = 0b10;
3958 def _S : sve2_wide_int_arith<0b10, { 0b10, opc }, asm, ZPR32, ZPR32, ZPR16>;
4002 let Inst{15-14} = 0b10;
6724 let Inst{21-20} = 0b10;
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H A DAArch64InstrFormats.td3093 let Inst{23-22} = 0b10;
3394 let Inst{11-10} = 0b10;
3850 let Inst{11-10} = 0b10;
3928 let Inst{11-10} = 0b10;
4000 let Inst{11-10} = 0b10;
4072 let Inst{11-10} = 0b10;
4144 let Inst{11-10} = 0b10;
4214 let Inst{11-10} = 0b10;
4371 let Inst{11-10} = 0b10;
12094 def RTRN : MOPSMemoryCopy<opcode, 0b10, 0b10, asm # "rtrn">;
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H A DAArch64InstrInfo.td1153 let Inst{9-8} = 0b10;
2103 defm ASRV : Shift<0b10, "asr", sra>;
2460 defm EON : LogicalReg<0b10, 1, "eon",
3011 defm LDRSW : Load32RO<0b10, 0, 0b10, GPR64, "ldrsw", i64, sextloadi32>;
3329 defm LDRSW : LoadUI<0b10, 0, 0b10, GPR64, uimm12s4, "ldrsw",
3571 : LoadUnscaled<0b10, 0, 0b10, GPR64, "ldursw",
3664 defm LDTRSW : LoadUnprivileged<0b10, 0, 0b10, GPR64, "ldtrsw">;
3691 def LDRSWpre : LoadPreIdx<0b10, 0, 0b10, GPR64z, "ldrsw">;
3718 def LDRSWpost : LoadPostIdx<0b10, 0, 0b10, GPR64z, "ldrsw">;
4073 defm LDAPURSW : BaseLoadUnscaleV84<"ldapursw", 0b10, 0b10, GPR64>;
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H A DSMEInstrFormats.td364 let Inst{23-22} = 0b10;
569 def _S : sme_mem_ld_ss_inst<0b0, 0b10, mnemonic # "w",
707 def _S : sme_mem_st_ss_inst<0b0, 0b10, mnemonic # "w",
1294 def _S : sve2_clamp<asm, 0b10, U, ZPR32>;
1334 let Inst{19-18} = 0b10;
1635 let Inst{21-20} = 0b10;
1675 let Inst{21-20} = 0b10;
2120 let Inst{21-20} = 0b10;
3342 let Inst{15-14} = 0b10;
3435 def _S : sme2_mova_vec_to_tile_vg2_multi_base<0b10, v,
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcInstrVIS.td185 def FHADDS : F3_3<0b10, 0b110100, 0b001100001,
188 def FHADDD : F3_3<0b10, 0b110100, 0b001100010,
191 def FHSUBS : F3_3<0b10, 0b110100, 0b001100101,
194 def FHSUBD : F3_3<0b10, 0b110100, 0b001100110,
206 def FNADDS : F3_3<0b10, 0b110100, 0b001010001,
209 def FNADDD : F3_3<0b10, 0b110100, 0b001010010,
212 def FNHADDS : F3_3<0b10, 0b110100, 0b001110001,
215 def FNHADDD : F3_3<0b10, 0b110100, 0b001110010,
219 def FNMULS : F3_3<0b10, 0b110100, 0b001011001,
222 def FNMULD : F3_3<0b10, 0b110100, 0b001011010,
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/freebsd-14.2/contrib/netbsd-tests/ipf/expected/
H A Dni13 …202 0202 0b00 5773 0000 0000 4500 0028 0000 4000 0111 6dba 0202 0202 0404 0404 afc9 829e 0014 6b10
5 …000 0000 4500 0028 0000 4000 0111 6dba 0202 0202 0404 0404 afc9 829e 0014 6b10 0402 0000 3be5 468d…
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsMSAInstrInfo.td429 class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>;
473 class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>;
521 class BNZ_W_ENC : MSA_CBRANCH_FMT<0b111, 0b10>;
528 class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>;
542 class BZ_W_ENC : MSA_CBRANCH_FMT<0b110, 0b10>;
549 class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>;
850 class LD_W_ENC : MSA_MI10_FMT<0b10, 0b1000>;
968 class NORI_B_ENC : MSA_I8_FMT<0b10, 0b000000>;
1001 class SHF_W_ENC : MSA_I8_FMT<0b10, 0b000010>;
1015 class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>;
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoZc.td133 let Inst{1-0} = 0b10;
162 def C_MUL : CA_ALU<0b100111, 0b10, "c.mul", GPRC>,
185 def CM_MVA01S : RVInst16CA<0b101011, 0b11, 0b10, (outs),
188 def CM_MVSA01 : RVInst16CA<0b101011, 0b01, 0b10, (outs SR07:$rs1, SR07:$rs2),
208 def CM_JT : RVInst16CJ<0b101, 0b10, (outs), (ins uimm5:$index),
217 def CM_JALT : RVInst16CJ<0b101, 0b10, (outs), (ins uimm8ge32:$index),
H A DRISCVInstrInfoC.td244 : RVInst16CI<funct3, 0b10, (outs cls:$rd), (ins SPMem:$rs1, opnd:$imm),
250 : RVInst16CSS<funct3, 0b10, (outs), (ins cls:$rs2, SPMem:$rs1, opnd:$imm),
467 let Inst{11-10} = 0b10;
475 def C_OR : CA_ALU<0b100011, 0b10, "c.or" , GPRC>,
499 def C_SLLI : RVInst16CI<0b000, 0b10, (outs GPRNoX0:$rd_wb),
536 def C_JR : RVInst16CR<0b1000, 0b10, (outs), (ins GPRNoX0:$rs1),
545 def C_MV : RVInst16CR<0b1000, 0b10, (outs GPRNoX0:$rs1), (ins GPRNoX0:$rs2),
554 def C_JALR : RVInst16CR<0b1001, 0b10, (outs), (ins GPRNoX0:$rs1),
558 def C_ADD : RVInst16CR<0b1001, 0b10, (outs GPRNoX0:$rs1_wb),
649 def C_ADD_HINT : RVInst16CR<0b1001, 0b10, (outs GPRX0:$rs1_wb),
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H A DRISCVInstrInfoXCV.td54 def CV_INSERT : CVInstBitManipRII<0b10, 0b000, (outs GPR:$rd_wb),
111 def CV_MACSRN : CVInstMacN<0b10, 0b110, "cv.macsrn">,
121 def CV_MACURN : CVInstMacN<0b10, 0b111, "cv.macurn">,
133 def CV_MULSRN : CVInstMulN<0b10, 0b100, "cv.mulsrn">,
143 def CV_MULURN : CVInstMulN<0b10, 0b101, "cv.mulurn">,
240 def CV_ADDRN : CVInstAluRRI<0b10, 0b010, "cv.addrn">,
248 def CV_SUBRN : CVInstAluRRI<0b10, 0b011, "cv.subrn">,
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstrNEON.td901 : NLdSt<0, 0b10, op11_8, op7_4,
941 : NLdSt<0, 0b10, op11_8, op7_4,
961 : NLdSt<0, 0b10, op11_8, op7_4,
1251 : NLdStLn<1, 0b10, op11_8, op7_4,
1288 : NLdStLn<1, 0b10, op11_8, op7_4,
1329 : NLdStLn<1, 0b10, op11_8, op7_4,
1421 def _fixed : NLdSt<1, 0b10, 0b1100, op7_4,
1603 : NLdSt<1, 0b10, 0b1111, op7_4,
1634 : NLdSt<1, 0b10, 0b1111, op7_4,
7285 def Df : N2VDIntnp<0b10, 0b10, 0b100, 0, NoItinerary,
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H A DARMInstrMVE.td768 let Inst{19-18} = 0b10;
1802 let VecSize = 0b10;
2383 let Inst{21-20} = 0b10;
3243 let Inst{10-9} = 0b10;
3570 let Inst{17-16} = 0b10;
4260 def MVE_VCMPi32 : MVE_VCMPqqi<"i32", 0b10>;
4264 def MVE_VCMPu32 : MVE_VCMPqqu<"u32", 0b10>;
4268 def MVE_VCMPs32 : MVE_VCMPqqs<"s32", 0b10>;
4993 vpred, cstr, 0b10, []> {
5834 let Inst{28-27} = 0b10;
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/freebsd-14.2/contrib/netbsd-tests/ipf/input/
H A Dni75 afc9 829e 0014 6b10 0402 0000
H A Dni16 afc9 829e 0014 6b10
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYInstrInfo16Instr.td74 def NOR16 : R16_XZ_BINOP<0b1011, 0b10, "nor16", BinOpFrag<(not (or node:$LHS, node:$RHS))>>;
76 def NOT16 : R16_Z_UNOP<0b1011, 0b10, "not16">;
79 def SUBU16XZ : R16_XZ_BINOP<0b1000, 0b10, "subu16", BinOpFrag<(sub node:$LHS, node:$RHS)>>;
83 def ASR16 : R16_XZ_BINOP<0b1100, 0b10, "asr16", BinOpFrag<(sra node:$LHS, node:$RHS)>>;
90 def SEXTB16 : R16_XZ_UNOP<0b1101, 0b10, "sextb16">;
118 def ADDI16XZ : I16_XZ_IMM3<0b10, "addi16", add>;
287 def REVB16 : R16_XZ_UNOP<0b1110, 0b10, "revb16">;
331 let Inst{1,0} = 0b10;
356 def BPUSHW : I16_BPushPop<0b00010100111, 0b10, (outs), (ins mGPR:$rz), "bpush.w $rz">;
361 def BPOPW : I16_BPushPop<0b00010100101, 0b10, (outs mGPR:$rz), (ins), "bpop.w $rz">;
/freebsd-14.2/sys/arm/ti/am335x/
H A Dtps65217x.h97 #define TPS65217_VO_420V 0b10
/freebsd-14.2/sys/contrib/libsodium/src/libsodium/crypto_core/ed25519/ref10/
H A Ded25519_ref10.c1096 int64_t b10 = 2097151 & (load_3(b + 26) >> 2); in sc25519_muladd() local
1175 s10 = c10 + a0 * b10 + a1 * b9 + a2 * b8 + a3 * b7 + a4 * b6 + a5 * b5 + in sc25519_muladd()
1179 s12 = a1 * b11 + a2 * b10 + a3 * b9 + a4 * b8 + a5 * b7 + a6 * b6 + in sc25519_muladd()
1181 s13 = a2 * b11 + a3 * b10 + a4 * b9 + a5 * b8 + a6 * b7 + a7 * b6 + in sc25519_muladd()
1183 s14 = a3 * b11 + a4 * b10 + a5 * b9 + a6 * b8 + a7 * b7 + a8 * b6 + in sc25519_muladd()
1185 s15 = a4 * b11 + a5 * b10 + a6 * b9 + a7 * b8 + a8 * b7 + a9 * b6 + in sc25519_muladd()
1189 s17 = a6 * b11 + a7 * b10 + a8 * b9 + a9 * b8 + a10 * b7 + a11 * b6; in sc25519_muladd()
1190 s18 = a7 * b11 + a8 * b10 + a9 * b9 + a10 * b8 + a11 * b7; in sc25519_muladd()
1191 s19 = a8 * b11 + a9 * b10 + a10 * b9 + a11 * b8; in sc25519_muladd()
1192 s20 = a9 * b11 + a10 * b10 + a11 * b9; in sc25519_muladd()
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/freebsd-14.2/crypto/openssl/test/
H A Dsanitytest.c40 a10, b10, c10, d10, e10, f10, g10, h10, i10, j10, in test_sanity_enum_size() enumerator
/freebsd-14.2/usr.bin/mkimg/tests/
H A Dimg-63x255-512-ebr.vhd.hex41 00008b10 00 00 00 00 42 0a 42 0a 42 0a 42 0a 42 0a 42 0a |....B.B.B.B.B.B.|
H A Dimg-63x255-4096-ebr.vhd.hex41 00008b10 00 00 00 00 42 0a 42 0a 42 0a 42 0a 42 0a 42 0a |....B.B.B.B.B.B.|
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRInstrFormats.td148 let Inst{15 - 14} = 0b10;
166 // a = regular/postinc/predec (reg = 0b00, postinc = 0b01, predec = 0b10)
265 // 0b10 for FMULS
357 let Inst{11 - 10} = 0b10;
/freebsd-14.2/sys/cddl/dev/kinst/riscv/
H A Dkinst_isa.c215 case 0b10: in kinst_emulate()
397 case 0b10: in kinst_instr_dissect()

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