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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SMEInstrInfo.td337 defm SMLSL_VG2_M2ZZI : sme2_int_mla_long_array_vg2_index<"smlsl", 0b01, int_aarch64_sme_smlsl_lane…
338 defm SMLSL_VG4_M4ZZI : sme2_int_mla_long_array_vg4_index<"smlsl", 0b01, int_aarch64_sme_smlsl_lane…
339 defm SMLSL_MZZ : sme2_mla_long_array_single<"smlsl",0b01, 0b01, nxv8i16, int_aarch64_sme_s…
340 defm SMLSL_VG2_M2ZZ : sme2_int_mla_long_array_vg2_single<"smlsl", 0b01, int_aarch64_sme_smlsl_sing…
342 defm SMLSL_VG2_M2Z2Z : sme2_int_mla_long_array_vg2_multi<"smlsl", 0b01, int_aarch64_sme_smlsl_vg2x…
343 defm SMLSL_VG4_M4Z4Z : sme2_int_mla_long_array_vg4_multi<"smlsl", 0b01, int_aarch64_sme_smlsl_vg2x…
892 defm BF1CVT_2ZZ_BtoH : sme2p1_fp8_cvt_vector_vg2_single<"bf1cvt", 0b01, 0b0>;
893 defm BF1CVTL_2ZZ_BtoH : sme2p1_fp8_cvt_vector_vg2_single<"bf1cvtl", 0b01, 0b1>;
948 defm FMOPA_MPPZZ_BtoH : sme2p1_fmop_tile_fp16<"fmopa", 0b1, 0b0, 0b01, ZPR8>;
965 defm FMLALL_MZZI_BtoS : sme2_mla_ll_array_index_32b<"fmlall", 0b01, 0b000, null_frag>;
[all …]
H A DAArch64SVEInstrInfo.td502 defm ORR_ZZZ : sve_int_bin_cons_log<0b01, "orr", or>;
556 defm EOR_ZI : sve_int_log_imm<0b01, "eor", "eon", xor>;
978 defm LD1RH_IMM : sve_mem_ld_dup<0b01, 0b01, "ld1rh", Z_h, ZPR16, uimm6s2>;
1324 defm LDNT1H_ZRI : sve_mem_cldnt_si<0b01, "ldnt1h", Z_h, ZPR16>;
1339 defm ST1H_IMM : sve_mem_cst_si<0b01, 0b01, "st1h", Z_h, ZPR16>;
1549 defm ST2H_IMM : sve_mem_est_si<0b01, 0b01, ZZ_h, "st2h", simm4s2>;
1568 def ST2H : sve_mem_est_ss<0b01, 0b01, ZZ_h, "st2h", GPR64NoXZRshifted16>;
1584 defm STNT1H_ZRI : sve_mem_cstnt_si<0b01, "stnt1h", Z_h, ZPR16>;
1602 defm PRFH_PRI : sve_mem_prfm_si<0b01, "prfh">;
4128 defm F2CVT_ZZ : sve2_fp8_cvt_single<0b0, 0b01, "f2cvt">;
[all …]
H A DAArch64InstrInfo.td2996 defm LDRH : Load16RO<0b01, 1, 0b01, FPR16Op, "ldr", f16, load>;
3174 defm LDRH : LoadUI<0b01, 1, 0b01, FPR16Op, uimm12s2, "ldr",
3272 defm LDRHH : LoadUI<0b01, 0, 0b01, GPR32, uimm12s2, "ldrh",
3398 defm LDURH : LoadUnscaled<0b01, 1, 0b01, FPR16Op, "ldur",
3413 : LoadUnscaled<0b01, 0, 0b01, GPR32, "ldurh",
3652 defm LDTRH : LoadUnprivileged<0b01, 0, 0b01, GPR32, "ldtrh">;
3672 def LDRHpre : LoadPreIdx<0b01, 1, 0b01, FPR16Op, "ldr">;
3688 def LDRHHpre : LoadPreIdx<0b01, 0, 0b01, GPR32z, "ldrh">;
3699 def LDRHpost : LoadPostIdx<0b01, 1, 0b01, FPR16Op, "ldr">;
3715 def LDRHHpost : LoadPostIdx<0b01, 0, 0b01, GPR32z, "ldrh">;
[all …]
H A DSVEInstrFormats.td1477 def _H : sve_int_perm_tbl<0b01, 0b01, asm, ZPR16, ZZ_h>;
1860 let Inst{15-14} = 0b01;
2785 let Inst{15-14} = 0b01;
3168 def _H : sve_int_bin_pred_arit_log<0b01, 0b01, opc, asm, ZPR16>,
3279 let Inst{15-14} = 0b01;
3790 let Inst{21-20} = 0b01;
4536 let Inst{21-20} = 0b01;
4994 let Inst{21-20} = 0b01;
5029 let Inst{21-20} = 0b01;
5973 let Inst{21-20} = 0b01;
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H A DAArch64InstrFormats.td1942 let Inst{20-19} = 0b01;
1957 let Inst{20-19} = 0b01;
3609 let Inst{25-24} = 0b01;
4464 let Inst{11-10} = 0b01;
5657 let Inst{11-10} = 0b01;
7326 let Inst{31-30} = 0b01;
7346 let Inst{31-30} = 0b01;
7439 let Inst{31-30} = 0b01;
7491 let Inst{31-30} = 0b01;
12089 def WTWN : MOPSMemoryCopy<opcode, 0b01, 0b01, asm # "wtwn">;
[all …]
H A DSMEInstrFormats.td561 def _H : sme_mem_ld_ss_inst<0b0, 0b01, mnemonic # "h",
699 def _H : sme_mem_st_ss_inst<0b0, 0b01, mnemonic # "h",
1293 def _H : sve2_clamp<asm, 0b01, U, ZPR16>;
1315 let Inst{15-14} = 0b01;
1914 let Inst{12-11} = 0b01;
2432 let Inst{21-20} = 0b01;
2553 let Inst{21-20} = 0b01;
2662 let Inst{21-20} = 0b01;
2805 let Inst{21-20} = 0b01;
3703 let Inst{12-11} = 0b01;
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYInstrFormats16Instr.td45 let Inst{15, 14} = 0b01;
58 let Inst{15, 14} = 0b01;
71 let Inst{15, 14} = 0b01;
84 let Inst{15, 14} = 0b01;
96 let Inst{15, 14} = 0b01;
109 let Inst{15, 14} = 0b01;
120 let Inst{15, 14} = 0b01;
178 let Inst{15, 14} = 0b01;
216 let Inst{15, 14} = 0b01;
H A DCSKYInstrInfo16Instr.td65 def ADDC16 : R16_XZ_BINOP_C<0b1000, 0b01, "addc16">;
82 def LSR16 : R16_XZ_BINOP<0b1100, 0b01, "lsr16", BinOpFrag<(srl node:$LHS, node:$RHS)>>;
86 def MULSH16 : R16_XZ_BINOP_NOPat<0b1111, 0b01, "mulsh16">;
89 def ZEXTH16 : R16_XZ_UNOP<0b1101, 0b01, "zexth16">;
182 let Inst{15,14} = 0b01;
193 let Inst{15,14} = 0b01;
221 def JSR16 : R16_X_J<0b11101111, 0b01, "jsr16"> {
293 let Inst{15, 14} = 0b01;
304 let Inst{15, 14} = 0b01;
327 let Inst{15,14} = 0b01;
[all …]
H A DCSKYInstrFormatsF2.td73 def _RZ : F2_XZ_P<datatype, {sop, 0b01}, op#".rz", [], outs, ins>;
137 : F2_LDST<0b01, sop, op#".64", outs, ins>;
157 : F2_LDSTM<0b01, sop, sop2, op#".64", outs, ins>;
181 : F2_LDSTR<0b01, sop, op#".64", outs, ins>;
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsMSAInstrInfo.td428 class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>;
472 class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>;
507 class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>;
520 class BNZ_H_ENC : MSA_CBRANCH_FMT<0b111, 0b01>;
541 class BZ_H_ENC : MSA_CBRANCH_FMT<0b110, 0b01>;
548 class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>;
849 class LD_H_ENC : MSA_MI10_FMT<0b01, 0b1000>;
972 class ORI_B_ENC : MSA_I8_FMT<0b01, 0b000000>;
1000 class SHF_H_ENC : MSA_I8_FMT<0b01, 0b000010>;
1014 class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>;
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoC.td387 def C_NOP : RVInst16CI<0b000, 0b01, (outs), (ins), "c.nop", "">,
393 def C_ADDI : RVInst16CI<0b000, 0b01, (outs GPRNoX0:$rd_wb),
402 def C_ADDI_NOP : RVInst16CI<0b000, 0b01, (outs GPRX0:$rd_wb),
419 def C_ADDIW : RVInst16CI<0b001, 0b01, (outs GPRNoX0:$rd_wb),
435 def C_ADDI16SP : RVInst16CI<0b011, 0b01, (outs SP:$rd_wb),
449 def C_LUI : RVInst16CI<0b011, 0b01, (outs GPRNoX0X2:$rd),
473 def C_XOR : CA_ALU<0b100011, 0b01, "c.xor", GPRC>,
483 def C_ADDW : CA_ALU<0b100111, 0b01, "c.addw", GPRC>,
634 def C_LUI_HINT : RVInst16CI<0b011, 0b01, (outs GPRX0:$rd),
676 def C_SRLI64_HINT : RVInst16CI<0b100, 0b01, (outs GPRC:$rd_wb),
[all …]
H A DRISCVInstrInfoZcmop.td18 : RVInst16CI<0b011, 0b01, (outs), (ins), opcodestr, ""> {
H A DRISCVInstrInfoXCV.td44 def CV_EXTRACTU : CVBitManipRII<0b01, 0b000, "cv.extractu">;
47 def CV_BSET : CVBitManipRII<0b01, 0b001, "cv.bset">;
109 def CV_MACHHSN : CVInstMacN<0b01, 0b110, "cv.machhsn">,
119 def CV_MACHHUN : CVInstMacN<0b01, 0b111, "cv.machhun">,
131 def CV_MULHHSN : CVInstMulN<0b01, 0b100, "cv.mulhhsn">,
141 def CV_MULHHUN : CVInstMulN<0b01, 0b101, "cv.mulhhun">,
238 def CV_ADDUN : CVInstAluRRI<0b01, 0b010, "cv.addun">,
246 def CV_SUBUN : CVInstAluRRI<0b01, 0b011, "cv.subun">,
H A DRISCVInstrInfoZicfiss.td19 let Inst{1-0} = 0b01;
H A DRISCVInstrInfoZc.td122 RVInst16CU<0b100111, funct5, 0b01, (outs GPRC:$rd_wb), (ins GPRC:$rd),
188 def CM_MVSA01 : RVInst16CA<0b101011, 0b01, 0b10, (outs SR07:$rs1, SR07:$rs2),
H A DRISCVInstrFormatsV.td29 def MOPLDIndexedUnord : RISCVMOP<0b01>;
34 def MOPSTIndexedUnord : RISCVMOP<0b01>;
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstrVFP.td551 defm VSELVS : vsel_inst<"vs", 0b01, 6>;
998 defm VCVTN : vcvt_inst<"n", 0b01>;
2110 def VNMLAD : ADbI<0b11100, 0b01, 1, 0,
2119 def VNMLAS : ASbI<0b11100, 0b01, 1, 0,
2132 def VNMLAH : AHbI<0b11100, 0b01, 1, 0,
2162 def VNMLSD : ADbI<0b11100, 0b01, 0, 0,
2171 def VNMLSS : ASbI<0b11100, 0b01, 0, 0,
2183 def VNMLSH : AHbI<0b11100, 0b01, 0, 0,
2307 def VFNMAD : ADbI<0b11101, 0b01, 1, 0,
2316 def VFNMAS : ASbI<0b11101, 0b01, 1, 0,
[all …]
H A DARMInstrNEON.td4024 let Inst{21-20} = 0b01; // imm6 = 01xxxx
4041 let Inst{21-20} = 0b01; // imm6 = 01xxxx
4061 let Inst{21-20} = 0b01; // imm6 = 01xxxx
4078 let Inst{21-20} = 0b01; // imm6 = 01xxxx
4100 let Inst{21-20} = 0b01; // imm6 = 01xxxx
5269 def VFMSLDI : VFMD<"vfmsl", "f16", 0b01>;
5271 def VFMSLQI : VFMQ<"vfmsl", "f16", 0b01>;
6115 def VABShd : N2VD<0b11, 0b11, 0b01, 0b01, 0b01110, 0,
6119 def VABShq : N2VQ<0b11, 0b11, 0b01, 0b01, 0b01110, 0,
6162 def VNEGhd : N2V<0b11, 0b11, 0b01, 0b01, 0b01111, 0, 0,
[all …]
H A DARMInstrMVE.td670 let Inst{17-16} = 0b01;
769 let Inst{17-16} = 0b01;
1521 let Inst{21-20} = 0b01;
1554 def MVE_VREV32_16 : MVE_VREV<"vrev32", "16", 0b01, 0b01, 0b10>;
1702 let Inst{7-6} = 0b01;
1815 let VecSize = 0b01;
2603 let Inst{7-6} = 0b01;
2847 let Inst{20-19} = 0b01;
2876 let Inst{17-16} = 0b01;
2957 let Inst{20-19} = 0b01;
[all …]
H A DARMInstrThumb2.td749 let Inst{26-25} = 0b01;
936 let Inst{25-24} = 0b01;
2211 let Inst{26-25} = 0b01;
2799 let Inst{26-25} = 0b01;
2816 let Inst{26-25} = 0b01;
2823 let Inst{7-6} = 0b01;
2831 let Inst{26-25} = 0b01;
2838 let Inst{7-6} = 0b01;
3359 def t2REV16 : T2I_misc<0b01, 0b01, (outs rGPR:$Rd), (ins rGPR:$Rm), IIC_iUNAr,
3385 let Inst{26-25} = 0b01;
[all …]
/freebsd-14.2/sys/arm/ti/am335x/
H A Dtps65217x.h96 #define TPS65217_VO_415V 0b01
/freebsd-14.2/crypto/openssl/test/
H A Dsanitytest.c31 a01, b01, c01, d01, e01, f01, g01, h01, i01, j01, in test_sanity_enum_size() enumerator
/freebsd-14.2/sys/cddl/dev/kinst/riscv/
H A Dkinst_isa.c175 case 0b01: in kinst_emulate()
387 case 0b01: in kinst_instr_dissect()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kInstrShiftRotate.td34 defvar MxROOP_LS = 0b01;
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRInstrFormats.td166 // a = regular/postinc/predec (reg = 0b00, postinc = 0b01, predec = 0b10)
216 let Inst{3 - 2} = 0b01;
264 // ff = 0b01 for FMUL

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