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Searched refs:addUse (Results 1 – 25 of 53) sorted by relevance

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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVBuiltins.cpp624 .addUse(ScopeReg) in buildAtomicCompareExchangeInst()
627 .addUse(Desired) in buildAtomicCompareExchangeInst()
630 MIRBuilder.buildInstr(SPIRV::OpStore).addUse(ExpectedArg).addUse(Tmp); in buildAtomicCompareExchangeInst()
695 MIB.addUse(PtrRegister).addUse(ScopeRegister).addUse(MemSemanticsReg); in buildAtomicFlagInst()
980 ExtractInst.addUse(LoadedVector).addUse(IndexRegister); in genWorkgroupQuery()
1220 .addUse(Image); in generateImageMiscQueryInst()
1288 .addUse(Image) in generateReadImageInst()
1311 .addUse(Lod); in generateReadImageInst()
1323 .addUse(Image) in generateReadImageInst()
1331 .addUse(Image) in generateReadImageInst()
[all …]
H A DSPIRVInstructionSelector.cpp546 .addUse(SrcReg) in selectUnOpWithSrc()
662 .addUse(Const) in selectMemOperation()
702 .addUse(Ptr) in selectAtomicRMW()
760 .addUse(Ptr) in selectAtomicCmpXchg()
1007 .addUse(Cmp0) in selectCmp()
1008 .addUse(Cmp1) in selectCmp()
1114 .addUse(OneReg) in selectSelect()
1163 .addUse(IntReg) in selectIntToBool()
1164 .addUse(One) in selectIntToBool()
1170 .addUse(Zero) in selectIntToBool()
[all …]
H A DSPIRVGlobalRegistry.cpp299 MIB.addUse(SpvScalConst); in getOrCreateIntCompositeOrNull()
372 MIB.addUse(SpvScalConst); in getOrCreateIntCompositeOrNull()
434 .addUse(getSPIRVTypeID(SpvType)); in getOrCreateConstNullPtr()
558 .addUse(NumElementsVReg); in getOpTypeArray()
586 MIB.addUse(Ty); in getOpTypeStruct()
609 .addUse(getSPIRVTypeID(ElemType)); in getOpTypePointer()
615 .addUse(createTypeVReg(MIRBuilder)) in getOpTypeForwardPointer()
626 MIB.addUse(getSPIRVTypeID(ArgType)); in getOpTypeFunction()
866 .addUse(getSPIRVTypeID(SampledType)) in getOrCreateOpTypeImage()
921 .addUse(getSPIRVTypeID(ImageType)); in getOrCreateOpTypeSampledImage()
[all …]
H A DSPIRVCallLowering.cpp43 .addUse(VRegs[0]) in lowerReturn()
363 .addUse(GR->getSPIRVTypeID(RetTy)) in lowerFormalArguments()
365 .addUse(GR->getSPIRVTypeID(FuncTy)); in lowerFormalArguments()
374 .addUse(GR->getSPIRVTypeID(ArgTypeVRegs[i])); in lowerFormalArguments()
389 .addUse(FuncVReg); in lowerFormalArguments()
481 .addUse(GR->getSPIRVTypeID(RetType)) in lowerCall()
488 MIB.addUse(Arg.Regs[0]); in lowerCall()
H A DSPIRVUtils.cpp99 auto MIB = MIRBuilder.buildInstr(SPIRV::OpName).addUse(Target); in buildOpName()
117 .addUse(Reg) in buildOpDecorate()
127 .addUse(Reg) in buildOpDecorate()
H A DSPIRVPreLegalizer.cpp243 .addUse(NewReg) in insertAssignInstr()
244 .addUse(GR->getSPIRVTypeID(SpirvTy)) in insertAssignInstr()
385 MIB.buildInstr(IdOpInfo.second).addDef(IdOpInfo.first).addUse(Op.getReg()); in processInstr()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsInstructionSelector.cpp279 .addUse(TiedDest) in buildUnalignedLoad()
334 .addUse(PseudoMULTuReg); in select()
363 .addUse(Mips::ZERO) in select()
385 .addUse(JTIndex); in select()
393 .addUse(DestAddress) in select()
414 .addUse(Dest); in select()
528 .addUse(HILOReg); in select()
714 .addUse(LUiReg) in select()
812 MIB.addUse(Instruction.RHS); in select()
874 .addUse(Mips::ZERO) in select()
[all …]
H A DMipsISelLowering.cpp4852 .addUse(Hi) in emitLDR_D()
4922 .addUse(Tmp) in emitSTR_W()
4934 .addUse(Tmp) in emitSTR_W()
4938 .addUse(Tmp) in emitSTR_W()
4975 .addUse(Lo) in emitSTR_D()
4994 .addUse(Lo) in emitSTR_D()
4998 .addUse(Hi) in emitSTR_D()
5018 .addUse(Lo) in emitSTR_D()
5022 .addUse(Lo) in emitSTR_D()
5026 .addUse(Hi) in emitSTR_D()
[all …]
H A DMipsSEISelDAGToDAG.cpp135 .addUse(Mips::RA_64, RegState::Undef) in emitMCountABI()
136 .addUse(Mips::ZERO_64); in emitMCountABI()
138 MIB.addUse(Mips::AT_64, RegState::Implicit); in emitMCountABI()
143 .addUse(Mips::RA, RegState::Undef) in emitMCountABI()
144 .addUse(Mips::ZERO); in emitMCountABI()
148 .addUse(Mips::SP) in emitMCountABI()
151 MIB.addUse(Mips::AT, RegState::Implicit); in emitMCountABI()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SpeculationHardening.cpp233 .addUse(MisspeculatingTaintReg) in insertTrackingCode()
234 .addUse(AArch64::XZR) in insertTrackingCode()
373 .addUse(AArch64::SP) in insertSPToRegTaintPropagation()
379 .addUse(AArch64::XZR) in insertSPToRegTaintPropagation()
380 .addUse(AArch64::XZR) in insertSPToRegTaintPropagation()
396 .addUse(AArch64::SP) in insertRegToSPTaintPropagation()
403 .addUse(MisspeculatingTaintReg, RegState::Kill) in insertRegToSPTaintPropagation()
408 .addUse(TmpReg, RegState::Kill) in insertRegToSPTaintPropagation()
456 .addUse(Reg); in makeGPRSpeculationSafe()
580 .addUse(SrcReg, RegState::Kill) in expandSpeculationSafeValue()
[all …]
H A DAArch64ExpandPseudoInsts.cpp368 .addUse(AArch64::WZR) in expandCMP_SWAP_128()
369 .addUse(AArch64::WZR) in expandCMP_SWAP_128()
889 .addUse(CtxReg) in expandStoreSwiftAsyncContext()
890 .addUse(BaseReg) in expandStoreSwiftAsyncContext()
906 .addUse(BaseReg) in expandStoreSwiftAsyncContext()
911 .addUse(AArch64::X16) in expandStoreSwiftAsyncContext()
918 .addUse(AArch64::XZR) in expandStoreSwiftAsyncContext()
919 .addUse(CtxReg) in expandStoreSwiftAsyncContext()
923 .addUse(AArch64::X17) in expandStoreSwiftAsyncContext()
928 .addUse(BaseReg) in expandStoreSwiftAsyncContext()
[all …]
H A DAArch64LowerHomogeneousPrologEpilog.cpp353 .addUse(AArch64::SP) in getOrCreateFrameHelper()
369 .addUse(AArch64::LR) in getOrCreateFrameHelper()
615 .addUse(AArch64::SP) in lowerProlog()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPULegalizerInfo.cpp3116 .addUse(PtrReg) in legalizeAtomicCmpXChg()
3219 .addUse(Src) in legalizeFlog2()
3421 .addUse(Src) in legalizeFExp2()
4786 .addUse(RHS) in legalizeFDIV16()
4787 .addUse(LHS) in legalizeFDIV16()
4901 .addUse(RHS) in legalizeFDIV32()
4902 .addUse(LHS) in legalizeFDIV32()
4982 .addUse(RHS) in legalizeFDIV64()
4983 .addUse(LHS) in legalizeFDIV64()
5090 .addUse(X) in legalizeFSQRTF32()
[all …]
H A DAMDGPUPostLegalizerCombiner.cpp319 .addUse(SqrtSrcMI->getOperand(0).getReg()) in matchRcpSqrtToRsq()
329 .addUse(RcpSrcMI->getOperand(0).getReg()) in matchRcpSqrtToRsq()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ArgumentStackSlotRebase.cpp168 .addUse(X86::NoRegister) in runOnMachineFunction()
170 .addUse(X86::NoRegister) in runOnMachineFunction()
H A DX86FrameLowering.cpp1555 .addUse(StackPtr) in emitPrologue()
1557 .addUse(X86::NoRegister) in emitPrologue()
1559 .addUse(X86::NoRegister) in emitPrologue()
1597 .addUse(X86::RIP) in emitPrologue()
1609 .addUse(MachineFramePtr) in emitPrologue()
1778 .addUse(X86::RSP) in emitPrologue()
1785 .addUse(X86::RSP) in emitPrologue()
2331 .addUse(ArgBaseReg) in emitEpilogue()
2333 .addUse(X86::NoRegister) in emitEpilogue()
2335 .addUse(X86::NoRegister) in emitEpilogue()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstructionSelector.cpp581 .addUse(LHSReg) in insertComparison()
582 .addUse(RHSReg) in insertComparison()
600 .addUse(PrevRes) in insertComparison()
778 .addUse(CondReg) in selectSelect()
794 .addUse(TrueReg) in selectSelect()
795 .addUse(FalseReg) in selectSelect()
888 .addUse(AndResult) in select()
938 .addUse(SrcReg) in select()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DMachineIRBuilder.cpp291 return buildInstr(TargetOpcode::G_BRINDIRECT).addUse(Tgt); in buildBrIndirect()
300 .addUse(TablePtr) in buildBrJT()
302 .addUse(IndexReg); in buildBrJT()
901 .addUse(Addr) in buildAtomicCmpXchgWithSuccess()
902 .addUse(CmpVal) in buildAtomicCmpXchgWithSuccess()
903 .addUse(NewVal) in buildAtomicCmpXchgWithSuccess()
926 .addUse(Addr) in buildAtomicCmpXchg()
927 .addUse(CmpVal) in buildAtomicCmpXchg()
928 .addUse(NewVal) in buildAtomicCmpXchg()
H A DRegBankSelect.cpp164 .addUse(Src); in repairReg()
198 MergeBuilder.addUse(SrcReg); in repairReg()
207 UnMergeBuilder.addUse(MO.getReg()); in repairReg()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64InstructionSelector.cpp701 RegSequence.addUse(Regs[I]); in createTuple()
1049 .addUse(SrcReg) in selectCopy()
1914 Shl.addUse(Src2Reg); in selectVectorSHL()
2010 .addUse(ListReg) in selectVaStartDarwin()
2970 .addUse(NewDst) in select()
3043 .addUse(LdReg) in select()
3287 .addUse(SrcReg) in select()
4235 .addUse(SrcReg) in selectUnmergeValues()
4261 .addUse(InsReg) in selectUnmergeValues()
4632 CmpMI.addUse(RHS); in emitFPCompare()
[all …]
H A DAArch64LegalizerInfo.cpp1638 NewI.addUse(MI.getOperand(1).getReg()); in legalizeLoadStore()
1643 NewI.addUse(Base); in legalizeLoadStore()
1831 UADD = MIRBuilder.buildIntrinsic(Opc, {HTy}).addUse(HSum); in legalizeCTPOP()
1888 .addUse(DesiredI->getOperand(0).getReg()) in legalizeAtomicCmpxchg128()
1890 .addUse(DesiredI->getOperand(1).getReg()) in legalizeAtomicCmpxchg128()
1893 .addUse(NewI->getOperand(0).getReg()) in legalizeAtomicCmpxchg128()
1895 .addUse(NewI->getOperand(1).getReg()) in legalizeAtomicCmpxchg128()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEInstrInfo.cpp795 BuildMI(*MBB, MI, DL, MCID).addDef(VMXu).addUse(VMYu).addUse(VMZu); in expandPseudoLogM()
796 BuildMI(*MBB, MI, DL, MCID).addDef(VMXl).addUse(VMYl).addUse(VMZl); in expandPseudoLogM()
800 BuildMI(*MBB, MI, DL, MCID).addDef(VMXu).addUse(VMYu); in expandPseudoLogM()
801 BuildMI(*MBB, MI, DL, MCID).addDef(VMXl).addUse(VMYl); in expandPseudoLogM()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/GISel/
H A DX86CallLowering.cpp110 MIB.addUse(PhysReg, RegState::Implicit); in assignValueToReg()
368 MIB.addUse(X86::AL, RegState::Implicit); in lowerCall()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/
H A DPPCCallLowering.cpp53 MIB.addUse(PhysReg, RegState::Implicit); in assignValueToReg()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/IR/
H A DValue.h505 void addUse(Use &U) { U.addToList(&UseList); } in addUse() function
885 if (V) V->addUse(*this); in set()

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