| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfoZa.td | 24 let RenderMethod = "addRegOperands"; 31 let RenderMethod = "addRegOperands";
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| H A D | RISCVInstrInfoD.td | 40 let RenderMethod = "addRegOperands"; 47 let RenderMethod = "addRegOperands";
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| H A D | RISCVInstrInfoF.td | 84 let RenderMethod = "addRegOperands";
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| H A D | RISCVInstrInfoC.td | 751 let RenderMethod = "addRegOperands";
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 1009 void addRegOperands(MCInst &Inst, unsigned N) const; 1013 addRegOperands(Inst, N); in addRegOrImmOperands() 1022 addRegOperands(Inst, N); in addRegOrImmWithInputModsOperands() 1042 addRegOperands(Inst, N); in addRegWithInputModsOperands() 6792 Op.addRegOperands(Inst, 1); in cvtExp() 8047 Op.addRegOperands(Inst, 1); in cvtMubufImpl() 8052 Op.addRegOperands(Inst, 1); in cvtMubufImpl() 8534 Op.addRegOperands(Inst, 1); in cvtVOPD() 8913 Op.addRegOperands(Inst, 1); in cvtVOP3DPP() 8988 Op.addRegOperands(Inst, 1); in cvtDPP() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64RegisterInfo.td | 186 let RenderMethod = "addRegOperands"; 675 let RenderMethod = "addRegOperands"; 724 let RenderMethod = "addRegOperands", ParserMethod="tryParseGPRSeqPair" in { 775 let RenderMethod = "addRegOperands"; 905 let RenderMethod = "addRegOperands"; 944 let RenderMethod = "addRegOperands"; 1087 let RenderMethod = "addRegOperands"; 1462 let RenderMethod = "addRegOperands"; 1520 let RenderMethod = "addRegOperands";
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/M68k/AsmParser/ |
| H A D | M68kAsmParser.cpp | 161 void addRegOperands(MCInst &Inst, unsigned N) const; 320 void M68kOperand::addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands() function in M68kOperand
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/BPF/AsmParser/ |
| H A D | BPFAsmParser.cpp | 191 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands() function
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Xtensa/AsmParser/ |
| H A D | XtensaAsmParser.cpp | 320 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands() function
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/MSP430/AsmParser/ |
| H A D | MSP430AsmParser.cpp | 127 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands() function in __anonb0eaffc40111::MSP430Operand
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AVR/AsmParser/ |
| H A D | AVRAsmParser.cpp | 135 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands() function in __anonca5d59280111::AVROperand
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/AsmParser/ |
| H A D | SystemZAsmParser.cpp | 300 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands() function in __anon2dbeb9140111::SystemZOperand 1301 ZOperand.addRegOperands(Inst, 1); in ParseDirectiveInsn()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZRegisterInfo.td | 41 let RenderMethod = "addRegOperands";
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/AsmParser/ |
| H A D | X86Operand.h | 569 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands() function
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/AsmParser/ |
| H A D | HexagonAsmParser.cpp | 376 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands() function 409 addRegOperands(Inst, N); in addsgp10ConstOperands()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/AsmParser/ |
| H A D | WebAssemblyAsmParser.cpp | 116 void addRegOperands(MCInst &, unsigned) const { in addRegOperands() function
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Lanai/AsmParser/ |
| H A D | LanaiAsmParser.cpp | 400 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands() function
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430InstrInfo.td | 96 let RenderMethod = "addRegOperands"; 108 let RenderMethod = "addRegOperands";
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/LoongArch/AsmParser/ |
| H A D | LoongArchAsmParser.cpp | 532 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands() function in __anonb17833500111::LoongArchOperand
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/VE/AsmParser/ |
| H A D | VEAsmParser.cpp | 465 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands() function in __anonb0359a6c0211::VEOperand
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/CSKY/AsmParser/ |
| H A D | CSKYAsmParser.cpp | 562 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands() function
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Sparc/AsmParser/ |
| H A D | SparcAsmParser.cpp | 396 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands() function in __anonc75c7c080211::SparcOperand
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kInstrInfo.td | 175 let RenderMethod = "addRegOperands", SuperClasses = [MxRegClass]in {
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 2538 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands() function in __anon2f82d7160111::ARMOperand 5602 ((ARMOperand &)*Operands[3]).addRegOperands(Inst, 1); in cvtThumbMultiply() 5611 ((ARMOperand &)*Operands[RegOp]).addRegOperands(Inst, 1); in cvtThumbMultiply() 5680 ((ARMOperand &)*Operands[2]).addRegOperands(Inst, 1); // Rt in cvtMVEVMOVQtoDReg() 5681 ((ARMOperand &)*Operands[3]).addRegOperands(Inst, 1); // Rt2 in cvtMVEVMOVQtoDReg() 5682 ((ARMOperand &)*Operands[4]).addRegOperands(Inst, 1); // Qd in cvtMVEVMOVQtoDReg()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/AsmParser/ |
| H A D | PPCAsmParser.cpp | 456 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands() function
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