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Searched refs:addOperand (Results 1 – 25 of 220) sorted by relevance

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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/
H A DMipsDisassembler.cpp563 MI.addOperand(MCOperand::createImm(tmp)); in DecodeINSVE_DF()
569 MI.addOperand(MCOperand::createImm(0)); in DecodeINSVE_DF()
584 MI.addOperand(MCOperand::createImm(Imm)); in DecodeDAHIDATIMMR6()
1037 MI.addOperand( in DecodeDEXT()
1039 MI.addOperand( in DecodeDEXT()
1080 MI.addOperand( in DecodeDINS()
1082 MI.addOperand( in DecodeDINS()
2466 MI.addOperand( in DecodeBgtzGroupBranchMMR6()
2470 MI.addOperand( in DecodeBgtzGroupBranchMMR6()
2511 MI.addOperand( in DecodeBlezGroupBranchMMR6()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/AsmParser/
H A DPPCAsmParser.cpp832 TmpInst.addOperand(Inst.getOperand(0)); in ProcessInstruction()
833 TmpInst.addOperand(Inst.getOperand(1)); in ProcessInstruction()
841 TmpInst.addOperand(Inst.getOperand(2)); in ProcessInstruction()
842 TmpInst.addOperand(Inst.getOperand(0)); in ProcessInstruction()
843 TmpInst.addOperand(Inst.getOperand(1)); in ProcessInstruction()
851 TmpInst.addOperand(Inst.getOperand(2)); in ProcessInstruction()
852 TmpInst.addOperand(Inst.getOperand(0)); in ProcessInstruction()
853 TmpInst.addOperand(Inst.getOperand(1)); in ProcessInstruction()
875 TmpInst.addOperand(Inst.getOperand(0)); in ProcessInstruction()
876 TmpInst.addOperand(Inst.getOperand(1)); in ProcessInstruction()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/CSKY/MCTargetDesc/
H A DCSKYMCCodeEmitter.cpp78 .addOperand(MI.getOperand(0)) in expandJBTF()
85 .addOperand(MI.getOperand(1)) in expandJBTF()
86 .addOperand(MI.getOperand(2)); in expandJBTF()
103 .addOperand(MI.getOperand(0)) in expandNEG()
104 .addOperand(MI.getOperand(1)); in expandNEG()
109 .addOperand(MI.getOperand(0)) in expandNEG()
110 .addOperand(MI.getOperand(0)) in expandNEG()
125 .addOperand(MI.getOperand(0)) in expandRSUBI()
126 .addOperand(MI.getOperand(1)); in expandRSUBI()
131 .addOperand(MI.getOperand(0)) in expandRSUBI()
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H A DCSKYAsmBackend.cpp303 Res.addOperand(Inst.getOperand(0)); in relaxInstruction()
304 Res.addOperand(Inst.getOperand(1)); in relaxInstruction()
308 Res.addOperand(Inst.getOperand(0)); in relaxInstruction()
312 Res.addOperand(Inst.getOperand(1)); in relaxInstruction()
316 Res.addOperand(Inst.getOperand(1)); in relaxInstruction()
321 Res.addOperand(Inst.getOperand(0)); in relaxInstruction()
322 Res.addOperand(Inst.getOperand(1)); in relaxInstruction()
323 Res.addOperand(Inst.getOperand(2)); in relaxInstruction()
327 Res.addOperand(Inst.getOperand(0)); in relaxInstruction()
328 Res.addOperand(Inst.getOperand(1)); in relaxInstruction()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp2549 Inst.addOperand(MCOperand::createImm( in addRegShiftedRegOperands()
2560 Inst.addOperand(MCOperand::createImm( in addRegShiftedImmOperands()
5612 Inst.addOperand(Inst.getOperand(0)); in cvtThumbMultiply()
8739 TmpInst.addOperand(Inst.getOperand(0)); in processInstruction()
8740 TmpInst.addOperand(Inst.getOperand(1)); in processInstruction()
8741 TmpInst.addOperand(Inst.getOperand(1)); in processInstruction()
8744 TmpInst.addOperand(Inst.getOperand(2)); in processInstruction()
8745 TmpInst.addOperand(Inst.getOperand(3)); in processInstruction()
8761 TmpInst.addOperand(Inst.getOperand(0)); in processInstruction()
8762 TmpInst.addOperand(Inst.getOperand(1)); in processInstruction()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCCompound.cpp216 CompoundInsn->addOperand(Rt); in getCompoundInsn()
228 CompoundInsn->addOperand(Rt); in getCompoundInsn()
229 CompoundInsn->addOperand(Rs); in getCompoundInsn()
242 CompoundInsn->addOperand(Rs); in getCompoundInsn()
243 CompoundInsn->addOperand(Rt); in getCompoundInsn()
255 CompoundInsn->addOperand(Rs); in getCompoundInsn()
256 CompoundInsn->addOperand(Rt); in getCompoundInsn()
268 CompoundInsn->addOperand(Rs); in getCompoundInsn()
269 CompoundInsn->addOperand(Rt); in getCompoundInsn()
286 CompoundInsn->addOperand(Rs); in getCompoundInsn()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonAsmPrinter.cpp251 T.addOperand(Inst.getOperand(i)); in ScaleVectorOffset()
283 Inst.addOperand(Reg); in HexagonProcessInstruction()
285 Inst.addOperand(S16); in HexagonProcessInstruction()
337 TmpInst.addOperand(Reg); in HexagonProcessInstruction()
354 TmpInst.addOperand(Reg); in HexagonProcessInstruction()
367 MappedInst.addOperand(Ps); in HexagonProcessInstruction()
445 TmpInst.addOperand( in HexagonProcessInstruction()
481 TmpInst.addOperand( in HexagonProcessInstruction()
508 TmpInst.addOperand( in HexagonProcessInstruction()
521 TmpInst.addOperand(Rdd); in HexagonProcessInstruction()
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/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCInstBuilder.h32 Inst.addOperand(MCOperand::createReg(Reg)); in addReg()
38 Inst.addOperand(MCOperand::createImm(Val)); in addImm()
44 Inst.addOperand(MCOperand::createSFPImm(Val)); in addSFPImm()
50 Inst.addOperand(MCOperand::createDFPImm(Val)); in addDFPImm()
56 Inst.addOperand(MCOperand::createExpr(Val)); in addExpr()
62 Inst.addOperand(MCOperand::createInst(Val)); in addInst()
67 MCInstBuilder &addOperand(const MCOperand &Op) { in addOperand() function
68 Inst.addOperand(Op); in addOperand()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AVR/Disassembler/
H A DAVRDisassembler.cpp77 Inst.addOperand(MCOperand::createReg(Register)); in DecodeGPR8RegisterClass()
88 Inst.addOperand(MCOperand::createReg(Register)); in DecodeLD8RegisterClass()
148 Inst.addOperand(MCOperand::createImm(addr)); in decodeFIOARr()
164 Inst.addOperand(MCOperand::createImm(addr)); in decodeFIORdA()
172 Inst.addOperand(MCOperand::createImm(addr)); in decodeFIOBIT()
173 Inst.addOperand(MCOperand::createImm(b)); in decodeFIOBIT()
243 Inst.addOperand(MCOperand::createImm(k)); in decodeFWRdK()
270 Inst.addOperand( in decodeMemri()
293 Inst.addOperand(MCOperand::createImm(Offset)); in decodeFBRk()
320 Inst.addOperand(MCOperand::createImm(Offset)); in decodeCondBranch()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Xtensa/Disassembler/
H A DXtensaDisassembler.cpp74 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeARRegisterClass()
89 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeSRRegisterClass()
145 Inst.addOperand(MCOperand::createImm( in decodeL32ROperand()
175 Inst.addOperand(MCOperand::createImm(Imm)); in decodeUimm4Operand()
182 Inst.addOperand(MCOperand::createImm(Imm)); in decodeUimm5Operand()
189 Inst.addOperand(MCOperand::createImm(Imm + 1)); in decodeImm1_16Operand()
197 Inst.addOperand(MCOperand::createImm(32 - Imm)); in decodeShimm1_31Operand()
207 Inst.addOperand(MCOperand::createImm(TableB4const[Imm])); in decodeB4constOperand()
218 Inst.addOperand(MCOperand::createImm(TableB4constu[Imm])); in decodeB4constuOperand()
226 Inst.addOperand(MCOperand::createImm((Imm >> 4) & 0xff)); in decodeMem8Operand()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEAsmPrinter.cpp89 SICInst.addOperand(RD); in emitSIC()
97 BSICInst.addOperand(R1); in emitBSIC()
98 BSICInst.addOperand(R2); in emitBSIC()
109 LEAInst.addOperand(RD); in emitLEAzzi()
113 LEAInst.addOperand(Imm); in emitLEAzzi()
133 LEAInst.addOperand(RD); in emitLEAzii()
136 LEAInst.addOperand(RS1); in emitLEAzii()
137 LEAInst.addOperand(Imm); in emitLEAzii()
158 Inst.addOperand(RD); in emitBinary()
159 Inst.addOperand(RS1); in emitBinary()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/Disassembler/
H A DRISCVDisassembler.cpp73 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPRRegisterClass()
84 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPRX1X5RegisterClass()
95 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPR16RegisterClass()
106 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPR32RegisterClass()
117 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPR32CRegisterClass()
128 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPR64RegisterClass()
139 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPR64CRegisterClass()
386 Inst.addOperand(Inst.getOperand(0)); in decodeRVCInstrRdRs1ImmZero()
387 Inst.addOperand(MCOperand::createImm(0)); in decodeRVCInstrRdRs1ImmZero()
417 Inst.addOperand(Inst.getOperand(0)); in decodeRVCInstrRdRs1UImm()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/Disassembler/
H A DAArch64Disassembler.cpp375 MI.addOperand(Imm4Op); in getInstruction()
739 Inst.addOperand( in DecodeMatrixTile()
934 Inst.addOperand(MCOperand::createImm(Imm)); in DecodeMRSSystemRegister()
944 Inst.addOperand(MCOperand::createImm(Imm)); in DecodeMSRSystemRegister()
967 Inst.addOperand(MCOperand::createImm(1)); in DecodeFMOVLaneInstruction()
1138 Inst.addOperand(Inst.getOperand(0)); in DecodeMoveImmInstruction()
1140 Inst.addOperand(MCOperand::createImm(imm)); in DecodeMoveImmInstruction()
1736 Inst.addOperand(MCOperand::createImm(imm)); in DecodeLogicalImmInstruction()
1753 Inst.addOperand(MCOperand::createImm(imm)); in DecodeModImmInstruction()
1791 Inst.addOperand(MCOperand::createImm(imm)); in DecodeModImmTiedInstruction()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/LoongArch/Disassembler/
H A DLoongArchDisassembler.cpp63 Inst.addOperand(MCOperand::createReg(LoongArch::R0 + RegNo)); in DecodeGPRRegisterClass()
72 Inst.addOperand(MCOperand::createReg(LoongArch::F0 + RegNo)); in DecodeFPR32RegisterClass()
81 Inst.addOperand(MCOperand::createReg(LoongArch::F0_64 + RegNo)); in DecodeFPR64RegisterClass()
90 Inst.addOperand(MCOperand::createReg(LoongArch::FCC0 + RegNo)); in DecodeCFRRegisterClass()
99 Inst.addOperand(MCOperand::createReg(LoongArch::FCSR0 + RegNo)); in DecodeFCSRRegisterClass()
108 Inst.addOperand(MCOperand::createReg(LoongArch::VR0 + RegNo)); in DecodeLSX128RegisterClass()
117 Inst.addOperand(MCOperand::createReg(LoongArch::XR0 + RegNo)); in DecodeLASX256RegisterClass()
126 Inst.addOperand(MCOperand::createReg(LoongArch::SCR0 + RegNo)); in DecodeSCRRegisterClass()
135 Inst.addOperand(MCOperand::createImm(Imm + P)); in decodeUImmOperand()
146 Inst.addOperand(MCOperand::createImm(SignExtend64<N + S>(Imm << S))); in decodeSImmOperand()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVAsmPrinter.cpp263 Inst.addOperand( in outputDebugSourceAndStrings()
274 Inst.addOperand(MCOperand::createReg(Reg)); in outputOpExtInstImports()
334 Inst.addOperand(MCOperand::createImm(Cap)); in outputGlobalRequirements()
412 Inst.addOperand(MCOperand::createReg(Reg)); in outputExecutionModeFromMDNode()
425 Inst.addOperand(MCOperand::createReg(Reg)); in outputExecutionModeFromNumthreadsAttribute()
435 Inst.addOperand(MCOperand::createImm(V)); in outputExecutionModeFromNumthreadsAttribute()
472 Inst.addOperand(MCOperand::createReg(FReg)); in outputExecutionMode()
474 Inst.addOperand(MCOperand::createImm(EM)); in outputExecutionMode()
485 Inst.addOperand(MCOperand::createImm(EM)); in outputExecutionMode()
517 Inst.addOperand(MCOperand::createReg(Reg)); in outputAnnotations()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/CSKY/Disassembler/
H A DCSKYDisassembler.cpp114 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[RegNo])); in DecodeGPRRegisterClass()
186 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[RegNo])); in DecodesGPRRegisterClass()
231 Inst.addOperand(MCOperand::createImm(Imm << S)); in decodeUImmOperand()
240 Inst.addOperand(MCOperand::createImm(Imm + 1)); in decodeOImmOperand()
248 Inst.addOperand(MCOperand::createImm((Imm & 0x7F) << 2)); in decodeLRW16Imm8()
251 Inst.addOperand(MCOperand::createImm(V << 2)); in decodeLRW16Imm8()
263 Inst.addOperand(MCOperand::createImm(16)); in decodeJMPIXImmOperand()
265 Inst.addOperand(MCOperand::createImm(24)); in decodeJMPIXImmOperand()
267 Inst.addOperand(MCOperand::createImm(32)); in decodeJMPIXImmOperand()
269 Inst.addOperand(MCOperand::createImm(40)); in decodeJMPIXImmOperand()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Lanai/Disassembler/
H A DLanaiDisassembler.cpp127 Instr.addOperand(MCOperand::createImm(AluOp)); in PostOperandDecodeAdjust()
170 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPRRegisterClass()
180 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[Register])); in decodeRiMemoryValue()
182 Inst.addOperand(MCOperand::createImm(SignExtend32<16>(Offset))); in decodeRiMemoryValue()
193 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[Register])); in decodeRrMemoryValue()
195 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[Register])); in decodeRrMemoryValue()
206 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[Register])); in decodeSplsValue()
208 Inst.addOperand(MCOperand::createImm(SignExtend32<10>(Offset))); in decodeSplsValue()
225 MI.addOperand(MCOperand::createImm(Insn)); in decodeBranch()
233 Inst.addOperand(MCOperand::createImm(SignExtend32<16>(Offset))); in decodeShiftImm()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstrInfo.cpp38 NopInst.addOperand(MCOperand::createImm(0)); in getNop()
39 NopInst.addOperand(MCOperand::createImm(ARMCC::AL)); in getNop()
40 NopInst.addOperand(MCOperand::createReg(0)); in getNop()
43 NopInst.addOperand(MCOperand::createReg(ARM::R0)); in getNop()
44 NopInst.addOperand(MCOperand::createReg(ARM::R0)); in getNop()
45 NopInst.addOperand(MCOperand::createImm(ARMCC::AL)); in getNop()
46 NopInst.addOperand(MCOperand::createReg(0)); in getNop()
47 NopInst.addOperand(MCOperand::createReg(0)); in getNop()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DMachineInstrBuilder.h102 MI->addOperand(*MF, MachineOperand::CreateReg(RegNo,
133 MI->addOperand(*MF, MachineOperand::CreateImm(Val)); in addImm()
138 MI->addOperand(*MF, MachineOperand::CreateCImm(Val)); in addCImm()
143 MI->addOperand(*MF, MachineOperand::CreateFPImm(Val)); in addFPImm()
154 MI->addOperand(*MF, MachineOperand::CreateFI(Idx)); in addFrameIndex()
199 MI->addOperand(*MF, MachineOperand::CreateRegMask(Mask)); in addRegMask()
226 MI->addOperand(*MF, MO); in add()
232 MI->addOperand(*MF, MO); in add()
238 MI->addOperand(*MF, MachineOperand::CreateMetadata(MD)); in addMetadata()
254 MI->addOperand(*MF, MachineOperand::CreateIntrinsicID(ID)); in addIntrinsicID()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp1692 Inst.addOperand(MCOperand::createImm(Op)); in DecodeSORegImmOperand()
2520 Inst.addOperand( in DecodeMemMultipleWritebackInstruction()
3681 Inst.addOperand(MCOperand::createImm(0)); in DecodeVLD3DupInstruction()
3815 Inst.addOperand(MCOperand::createReg(0)); in DecodeMVEModImmInstruction()
3816 Inst.addOperand(MCOperand::createImm(0)); in DecodeMVEModImmInstruction()
3842 Inst.addOperand(MCOperand::createImm(Qd)); in DecodeMVEVADCInstruction()
6154 Inst.addOperand(MCOperand::createImm(0)); in DecodeNEONComplexLane64Instruction()
6445 Inst.addOperand(MCOperand::createReg(0)); in DecodeVSCCLRM()
6713 Inst.addOperand(MCOperand::createReg(0)); in DecodeVSTRVLDR_SYSREG()
6974 Inst.addOperand(MCOperand::createReg(0)); in DecodeMVEVCMP()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/AsmParser/
H A DHexagonAsmParser.cpp546 NewInst.addOperand(I); in canonicalizeImmediates()
1235 TmpInst.addOperand(Rdd); in makeCombineInst()
1236 TmpInst.addOperand(MO1); in makeCombineInst()
1237 TmpInst.addOperand(MO2); in makeCombineInst()
1347 Inst.addOperand(Reg); in processInstruction()
1349 Inst.addOperand(S27); in processInstruction()
1635 TmpInst.addOperand(Rx); in processInstruction()
1636 TmpInst.addOperand(Rx); in processInstruction()
1637 TmpInst.addOperand(Rs); in processInstruction()
1655 TmpInst.addOperand(Rx); in processInstruction()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARC/Disassembler/
H A DARCDisassembler.cpp140 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPR32RegisterClass()
212 Inst.addOperand(MCOperand::createImm( in DecodeSignedOperand()
224 Inst.addOperand( in DecodeFromCyclicRange()
241 Inst.addOperand(MCOperand::createImm(LImm)); in DecodeStLImmInstruction()
242 Inst.addOperand(MCOperand::createImm(0)); in DecodeStLImmInstruction()
259 Inst.addOperand(MCOperand::createImm(LImm)); in DecodeLdLImmInstruction()
260 Inst.addOperand(MCOperand::createImm(0)); in DecodeLdLImmInstruction()
316 Inst.addOperand(MCOperand::createImm(U6Field)); in DecodeCCRU6Instruction()
318 Inst.addOperand(MCOperand::createImm(CCField)); in DecodeCCRU6Instruction()
329 Inst.addOperand(MCOperand::createImm(U6)); in DecodeSOPwithRU6()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/Disassembler/
H A DPPCDisassembler.cpp68 Inst.addOperand(MCOperand::createImm(SignExtend32<14>(Imm))); in decodeCondBrTarget()
76 Inst.addOperand(MCOperand::createImm(Offset)); in decodeDirectBrTarget()
88 Inst.addOperand(MCOperand::createReg(Regs[RegNo])); in decodeRegisterClass()
253 Inst.addOperand(MCOperand::createImm(Imm)); in decodeUImmOperand()
263 Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm))); in decodeSImmOperand()
272 Inst.addOperand(MCOperand::createImm(Imm)); in decodeImmZeroOperand()
302 Inst.addOperand(MCOperand::createImm(Disp)); in decodeDispRIHashOperand()
321 Inst.addOperand(MCOperand::createImm(Disp << 3)); in decodeDispSPE8Operand()
332 Inst.addOperand(MCOperand::createImm(Disp << 2)); in decodeDispSPE4Operand()
342 Inst.addOperand(MCOperand::createImm(Disp << 1)); in decodeDispSPE2Operand()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsTargetStreamer.cpp179 TmpInst.addOperand(MCOperand::createReg(Reg0)); in emitR()
188 TmpInst.addOperand(MCOperand::createReg(Reg0)); in emitRX()
189 TmpInst.addOperand(Op1); in emitRX()
208 TmpInst.addOperand(MCOperand::createImm(Imm1)); in emitII()
209 TmpInst.addOperand(MCOperand::createImm(Imm2)); in emitII()
219 TmpInst.addOperand(MCOperand::createReg(Reg0)); in emitRRX()
220 TmpInst.addOperand(MCOperand::createReg(Reg1)); in emitRRX()
221 TmpInst.addOperand(Op2); in emitRRX()
237 TmpInst.addOperand(MCOperand::createReg(Reg0)); in emitRRRX()
238 TmpInst.addOperand(MCOperand::createReg(Reg1)); in emitRRRX()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64AsmPrinter.cpp1416 MI.addOperand(Dest); in LowerFAULTING_OP()
1535 MovZ.addOperand(Hi_MCSym); in emitInstruction()
1543 MovK.addOperand(Lo_MCSym); in emitInstruction()
1618 TmpInst.addOperand(Dest); in emitInstruction()
1661 Adrp.addOperand(SymTLSDesc); in emitInstruction()
1673 Ldr.addOperand(SymTLSDescLo12); in emitInstruction()
1695 TLSDescCall.addOperand(Sym); in emitInstruction()
1914 Adrp.addOperand(SymPage); in emitMachOIFuncStubBody()
1928 Ldr.addOperand(SymPageOff); in emitMachOIFuncStubBody()
2027 Adrp.addOperand(SymPage); in emitMachOIFuncStubHelperBody()
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