Searched refs:ZReg (Results 1 – 7 of 7) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 1266 True = ZReg; in emitSelect() 1267 False = ZReg; in emitSelect() 1274 True = ZReg; in emitSelect() 1275 False = ZReg; in emitSelect() 1286 False = ZReg; in emitSelect() 1295 False = ZReg; in emitSelect() 1306 False = ZReg; in emitSelect() 1313 False = ZReg; in emitSelect() 4582 return emitCSINC(/*Dst=*/Dst, /*Src1=*/ZReg, /*Src2=*/ZReg, InvCC1, in emitCSetForFCmp() 4588 emitCSINC(/*Dst=*/Def1Reg, /*Src1=*/ZReg, /*Src2=*/ZReg, InvCC1, MIRBuilder); in emitCSetForFCmp() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 5179 static inline bool isMatchingOrAlias(unsigned ZReg, unsigned Reg) { in isMatchingOrAlias() argument 5180 assert((ZReg >= AArch64::Z0) && (ZReg <= AArch64::Z31)); in isMatchingOrAlias() 5181 return (ZReg == ((Reg - AArch64::B0) + AArch64::Z0)) || in isMatchingOrAlias() 5182 (ZReg == ((Reg - AArch64::H0) + AArch64::Z0)) || in isMatchingOrAlias() 5183 (ZReg == ((Reg - AArch64::S0) + AArch64::Z0)) || in isMatchingOrAlias() 5184 (ZReg == ((Reg - AArch64::D0) + AArch64::Z0)) || in isMatchingOrAlias() 5185 (ZReg == ((Reg - AArch64::Q0) + AArch64::Z0)) || in isMatchingOrAlias() 5186 (ZReg == ((Reg - AArch64::Z0) + AArch64::Z0)); in isMatchingOrAlias()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 572 unsigned ZReg = Is64Bit ? AArch64::XZR : AArch64::WZR; in fastMaterializeFloatZero() local 574 return fastEmitInst_r(Opc, TLI.getRegClassFor(VT), ZReg); in fastMaterializeFloatZero() 4034 unsigned Opc, ZReg; in emitMul_rr() local 4041 Opc = AArch64::MADDWrrr; ZReg = AArch64::WZR; break; in emitMul_rr() 4043 Opc = AArch64::MADDXrrr; ZReg = AArch64::XZR; break; in emitMul_rr() 4048 return fastEmitInst_rrr(Opc, RC, Op0, Op1, ZReg); in emitMul_rr()
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| H A D | AArch64InstrInfo.cpp | 663 unsigned ZReg = removeCopies(MRI, DefMI->getOperand(1).getReg()); in canFoldIntoCSel() local 664 if (ZReg != AArch64::XZR && ZReg != AArch64::WZR) in canFoldIntoCSel() 681 unsigned ZReg = removeCopies(MRI, DefMI->getOperand(1).getReg()); in canFoldIntoCSel() local 682 if (ZReg != AArch64::XZR && ZReg != AArch64::WZR) in canFoldIntoCSel()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | Hexagon.td | 31 "Hexagon ZReg extension instructions">;
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 6113 unsigned ZReg = in expandPostRAPseudo() local 6115 MIB->getOperand(0).setReg(ZReg); in expandPostRAPseudo()
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| H A D | X86ISelLowering.cpp | 35222 Register ZReg = MRI.createVirtualRegister(PtrRC); in emitSetJmpShadowStackFix() local 35225 .addDef(ZReg) in emitSetJmpShadowStackFix() 35226 .addReg(ZReg, RegState::Undef) in emitSetJmpShadowStackFix() 35227 .addReg(ZReg, RegState::Undef); in emitSetJmpShadowStackFix() 35232 BuildMI(*MBB, MI, MIMD, TII->get(RdsspOpc), SSPCopyReg).addReg(ZReg); in emitSetJmpShadowStackFix() 35473 Register ZReg = MRI.createVirtualRegister(&X86::GR32RegClass); in emitLongJmpShadowStackFix() local 35474 BuildMI(checkSspMBB, MIMD, TII->get(X86::MOV32r0), ZReg); in emitLongJmpShadowStackFix() 35480 .addReg(ZReg) in emitLongJmpShadowStackFix() 35482 ZReg = TmpZReg; in emitLongJmpShadowStackFix() 35488 BuildMI(checkSspMBB, MIMD, TII->get(RdsspOpc), SSPCopyReg).addReg(ZReg); in emitLongJmpShadowStackFix()
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