| /freebsd-14.2/contrib/llvm-project/lldb/source/Plugins/ABI/X86/ |
| H A D | ABIX86.cpp | 178 #define YMM(n) \ macro 196 YMM(0), YMM(1), YMM(2), YMM(3), YMM(4), YMM(5), YMM(6), YMM(7)}}; in makeBaseRegMap() 204 YMM(8), YMM(9), YMM(10), YMM(11), YMM(12), in makeBaseRegMap() 205 YMM(13), YMM(14), YMM(15)}}; in makeBaseRegMap()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86Schedule.td | 85 X86FoldableSchedWrite YMM = s256; // YMM operations. 121 X86SchedWriteMoveLS YMM = s256; // YMM operations. 297 defm WriteFMAY : X86SchedWritePair<ReadAfterVecYLd>; // Fused Multiply Add (YMM). 385 defm WritePMULLDY : X86SchedWritePair<ReadAfterVecYLd>; // Vector PMULLD (YMM). 389 defm WriteShuffleY : X86SchedWritePair<ReadAfterVecYLd>; // Vector shuffles (YMM). 396 defm WriteBlendY : X86SchedWritePair<ReadAfterVecYLd>; // Vector blends (YMM). 403 defm WritePSADBWY : X86SchedWritePair<ReadAfterVecYLd>; // Vector PSADBW (YMM). 406 defm WriteMPSADY : X86SchedWritePair<ReadAfterVecYLd>; // Vector MPSAD (YMM). 429 defm WriteCvtPS2IY : X86SchedWritePair<ReadAfterVecYLd>; // Float -> Integer (YMM). 439 defm WriteCvtI2PSY : X86SchedWritePair<ReadAfterVecYLd>; // Integer -> Float (YMM). [all …]
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| H A D | X86ScheduleZnver3.td | 910 defm : X86WriteResPairUnsupported<WriteFMulZ>; // Floating point multiplication (YMM). 942 defm : Zn3WriteResYMMPair<WriteFMAY, [Zn3FPFMul01], 4, [1], 1>; // Fused Multiply Add (YMM). 1116 defm : Zn3WriteResYMMPair<WritePMULLDY, [Zn3FPVMul01], 3, [1], 1>; // Vector PMULLD (YMM). 1120 defm : Zn3WriteResYMMPair<WriteShuffleY, [Zn3FPVShuf01], 1, [1], 1>; // Vector shuffles (YMM). 1127 defm : Zn3WriteResYMMPair<WriteBlendY, [Zn3FPVMisc0123], 1, [1], 1>; // Vector blends (YMM). 1134 defm : Zn3WriteResYMMPair<WritePSADBWY, [Zn3FPVAdd0123], 3, [2], 1>; // Vector PSADBW (YMM). 1168 defm : Zn3WriteResYMMPair<WriteCvtPS2IY, [Zn3FPFCvt01], 3, [1], 1>; // Float -> Integer (YMM). 1185 defm : Zn3WriteResYMMPair<WriteCvtI2PSY, [Zn3FPFCvt01], 3, [1], 1>; // Integer -> Float (YMM). 1469 // AVX YMM variants. 1584 // AVX YMM Zero-idioms. [all …]
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| H A D | X86ScheduleZnver4.td | 956 defm : Zn4WriteResYMMPair<WriteFMAY, [Zn4FPFMul01], 4, [1], 1>; // Fused Multiply Add (YMM). 1162 defm : Zn4WriteResYMMPair<WritePMULLDY, [Zn4FPVMul01], 3, [1], 1>; // Vector PMULLD (YMM). 1166 defm : Zn4WriteResYMMPair<WriteShuffleY, [Zn4FPVShuf01], 1, [1], 1>; // Vector shuffles (YMM). 1173 defm : Zn4WriteResYMMPair<WriteBlendY, [Zn4FPVMisc0123], 1, [1], 1>; // Vector blends (YMM). 1180 defm : Zn4WriteResYMMPair<WritePSADBWY, [Zn4FPVAdd0123], 3, [2], 1>; // Vector PSADBW (YMM). 1201 defm : Zn4WriteResYMMPair<WriteCvtPD2IY, [Zn4FPFCvt01], 3, [2], 2>; // Double -> Integer (YMM). 1212 defm : Zn4WriteResYMMPair<WriteCvtPS2IY, [Zn4FPFCvt01], 4, [1], 1>; // Float -> Integer (YMM). 1228 defm : Zn4WriteResYMMPair<WriteCvtI2PSY, [Zn4FPFCvt01], 3, [1], 1>; // Integer -> Float (YMM). 1525 // AVX YMM variants. 1917 // AVX YMM Zero-idioms. [all …]
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| H A D | X86SchedBroadwell.td | 263 defm : BWWriteResPair<WriteFAddY, [BWPort1], 3, [1], 1, 6>; // Floating point add/sub (YMM/ZMM). 272 defm : BWWriteResPair<WriteFCmpY, [BWPort1], 3, [1], 1, 6>; // Floating point compare (YMM/ZMM). 324 defm : BWWriteResPair<WriteFMAY, [BWPort01], 5, [1], 1, 6>; // Fused Multiply Add (YMM/ZMM). 331 defm : X86WriteRes<WriteFRndY, [BWPort23], 6, [1], 1>; // Floating point rounding (YMM… 431 defm : BWWriteResPair<WriteVecLogicY,[BWPort015], 1, [1], 1, 6>; // Vector integer and/or/xor (YMM/… 445 defm : BWWriteResPair<WritePMULLDY, [BWPort0], 10, [2], 2, 6>; // Vector PMULLD (YMM/ZMM). 449 defm : BWWriteResPair<WriteShuffleY, [BWPort5], 1, [1], 1, 6>; // Vector shuffles (YMM/ZMM). 453 defm : BWWriteResPair<WriteVarShuffleY,[BWPort5], 1, [1], 1, 6>; // Vector variable shuffles (YMM/Z… 456 defm : BWWriteResPair<WriteBlendY, [BWPort5], 1, [1], 1, 6>; // Vector blends (YMM/ZMM). 462 defm : BWWriteResPair<WriteVarBlendY, [BWPort5], 2, [2], 2, 6>; // Vector variable blends (YMM/ZMM). [all …]
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| H A D | X86CallingConv.td | 47 list<Register> YMM = []; 59 let YMM = [YMM0, YMM1, YMM2, YMM3, YMM4, YMM5, YMM6, YMM7]; 73 let YMM = [YMM0, YMM1, YMM2, YMM3, YMM4, YMM5, YMM6, YMM7]; 80 let YMM = [YMM0, YMM1, YMM2, YMM3, YMM4, YMM5, YMM6, YMM7, 151 // __m256, __m256i, __m256d --> YMM 154 CCIfSubtarget<"hasAVX()", CCAssignToReg<RC.YMM>>>, 228 // __m256, __m256i, __m256d --> YMM 230 CCIfSubtarget<"hasAVX()", CCAssignToReg<RC.YMM>>>, 799 // AVX 256-bit vector arguments are passed in YMM registers. 819 // AVX 256-bit vector arguments are passed in YMM registers. [all …]
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| H A D | X86InstrFMA.td | 113 VR256, OpTy256, f256mem, MemFrag256, Op, sched.YMM>, 116 VR256, OpTy256, f256mem, MemFrag256, Op, sched.YMM>, 119 VR256, OpTy256, f256mem, MemFrag256, Op, sched.YMM>, 504 REX_W, VEX_L, Sched<[sched.YMM]>; 511 Sched<[sched.YMM.Folded, sched.YMM.ReadAfterFold, sched.YMM.ReadAfterFold]>; 518 Sched<[sched.YMM.Folded, sched.YMM.ReadAfterFold, 523 sched.YMM.ReadAfterFold]>; 535 VEX_L, Sched<[sched.YMM]>;
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| H A D | X86InstrSSE.td | 417 let SchedRW = [SchedWriteFMoveLS.YMM.MR] in { 1576 // YMM only 1660 // YMM only 3610 OpNode, OpNode2, VR256, sched.YMM, schedImm.YMM, 4489 Sched<[sched.YMM]>; 4701 Sched<[sched.YMM]>; 5711 Sched<[SchedWriteVecTest.YMM.Folded, SchedWriteVecTest.YMM.ReadAfterFold]>, 7230 // with YMM register containing zero. 7474 // VZERO - Zero YMM registers 7481 // Zero All YMM registers [all …]
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| H A D | X86InstrXOP.td | 82 SchedWriteFRnd.YMM>; 91 SchedWriteFRnd.YMM>; 371 SchedWriteShuffle.YMM>, VEX_L; 462 SchedWriteFVarShuffle.YMM>, VEX_L; 471 SchedWriteFVarShuffle.YMM>, VEX_L;
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| H A D | X86InstrAVX512.td | 2067 defm Z256 : avx512_icmp_packed<opc, OpcodeStr, sched.YMM, 2582 defm Z256 : avx512_vector_fpclass<opc, OpcodeStr, sched.YMM, 3274 Sched.YMM, NoRMPattern>, EVEX_V256; 5872 defm WZ256: avx512_vptest<opc, OpcodeStr#"w", sched.YMM, 5876 defm BZ256: avx512_vptest<opc, OpcodeStr#"b", sched.YMM, 5985 sched.YMM, VTInfo.info256>, 6602 sched.YMM, _.info256>, 6699 sched.YMM, _.info256>, 6797 sched.YMM, _.info256>, 9311 sched.YMM>, [all …]
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| H A D | X86RegisterInfo.td | 385 def YMM#Index : X86Reg<"ymm"#Index, Index, [!cast<X86Reg>("XMM"#Index)]>, 391 def YMM#Index : X86Reg<"ymm"#Index, Index, [!cast<X86Reg>("XMM"#Index)]>, 400 def ZMM#Index : X86Reg<"zmm"#Index, Index, [!cast<X86Reg>("YMM"#Index)]>, 774 256, (sequence "YMM%u", 0, 15)>; 809 256, (sequence "YMM%u", 0, 31)>;
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| H A D | X86ScheduleZnver1.td | 985 //=== Floating Point XMM and YMM Instructions ===// 1359 // AVX YMM Zero-idioms. 1391 // AVX YMM
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| H A D | X86ScheduleZnver2.td | 993 //=== Floating Point XMM and YMM Instructions ===// 1365 // AVX YMM Zero-idioms. 1397 // AVX YMM
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| H A D | X86SchedHaswell.td | 859 //=== Floating Point XMM and YMM Instructions ===//
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| /freebsd-14.2/contrib/llvm-project/lldb/source/Plugins/Process/Utility/ |
| H A D | RegisterContext_x86.h | 306 struct YMM { struct 329 YMM = SSE << 1, enumerator 330 BNDREGS = YMM << 1,
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| H A D | RegisterContextPOSIX_x86.h | 157 lldb_private::YMM m_ymm_set; // copy of ymmh and xmm register halves.
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| H A D | RegisterContextPOSIX_x86.cpp | 403 ::memset(&m_ymm_set, 0, sizeof(YMM)); in RegisterContextPOSIX_x86()
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| /freebsd-14.2/crypto/openssl/doc/man3/ |
| H A D | OPENSSL_ia32cap.pod | 56 =item bit #59, OSXSAVE bit, denoting availability of YMM registers;
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