Searched refs:ValSize (Results 1 – 10 of 10) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/IR/ |
| H A D | AttributeImpl.h | 159 unsigned ValSize; variable
161 return KindSize + 1 + ValSize + 1; in numTrailingObjects()
167 ValSize(Val.size()) { in AttributeImpl()
173 TrailingString[KindSize + 1 + ValSize] = '\0'; in AttributeImpl()
180 return StringRef(getTrailingObjects<char>() + KindSize + 1, ValSize); in getStringValue()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMCallLowering.cpp | 290 uint64_t ValSize = VA.getValVT().getFixedSizeInBits(); in assignValueToReg() local
293 assert(ValSize <= 64 && "Unsupported value size"); in assignValueToReg()
297 if (ValSize == LocSize) { in assignValueToReg()
300 assert(ValSize < LocSize && "Extensions not supported"); in assignValueToReg()
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| H A D | ARMInstructionSelector.cpp | 1090 const auto ValSize = ValTy.getSizeInBits(); in select() local
1092 assert((ValSize != 64 || STI.hasVFP2Base()) && in select()
1095 const auto NewOpc = selectLoadStoreOpCode(I.getOpcode(), RegBank, ValSize); in select()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerCombiner.cpp | 660 unsigned ValSize = StoredValTy.getSizeInBits(); in optimizeConsecutiveMemOpAddressing() local
661 if (ValSize < 32 || ValSize != St->getMMO().getSizeInBits()) in optimizeConsecutiveMemOpAddressing()
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| H A D | AArch64LegalizerInfo.cpp | 1706 uint64_t ValSize = ValTy.getSizeInBits() / 8; in legalizeVaArg() local
1712 auto Size = MIRBuilder.buildConstant(IntPtrTy, alignTo(ValSize, PtrAlign)); in legalizeVaArg()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructionSelector.cpp | 3175 unsigned ValSize = ValTy.getSizeInBits(); in selectG_INSERT_VECTOR_ELT() local
3199 if (VecRB->getID() == AMDGPU::VGPRRegBankID && ValSize != 32) in selectG_INSERT_VECTOR_ELT()
3204 computeIndirectRegIndex(*MRI, TRI, VecRC, IdxReg, ValSize / 8, *KB); in selectG_INSERT_VECTOR_ELT()
3217 VecSize, ValSize, VecRB->getID() == AMDGPU::SGPRRegBankID); in selectG_INSERT_VECTOR_ELT()
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| H A D | AMDGPULegalizerInfo.cpp | 3001 const unsigned ValSize = ValTy.getSizeInBits(); in legalizeLoad() local
3013 if (WideMemSize == ValSize) { in legalizeLoad()
3025 if (ValSize > WideMemSize) in legalizeLoad()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 685 unsigned ValSize = VA.getValVT().getSizeInBits() / 8; in LowerFormalArguments_64() local
690 Offset += 8 - ValSize; in LowerFormalArguments_64()
691 int FI = MF.getFrameInfo().CreateFixedObject(ValSize, Offset, true); in LowerFormalArguments_64()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 516 unsigned ValSize = VA.getValVT().getSizeInBits() / 8; in LowerFormalArguments() local
531 int FI = MF.getFrameInfo().CreateFixedObject(ValSize, Offset, true); in LowerFormalArguments()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 7110 const unsigned ValSize = ValVT.getStoreSize(); in LowerFormalArguments_AIX() local
7111 assert((ValSize <= LocSize) && in LowerFormalArguments_AIX()
7115 if (LocSize > ValSize) in LowerFormalArguments_AIX()
7116 CurArgOffset += LocSize - ValSize; in LowerFormalArguments_AIX()
7121 int FI = MFI.CreateFixedObject(ValSize, CurArgOffset, IsImmutable); in LowerFormalArguments_AIX()
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