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Searched refs:VVT (Results 1 – 9 of 9) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/utils/TableGen/
H A DDAGISelMatcherGen.cpp39 const ValueTypeByHwMode &VVT = RC.getValueTypeNum(0); in getRegisterValueType() local
40 assert(VVT.isSimple()); in getRegisterValueType()
41 VT = VVT.getSimple().SimpleTy; in getRegisterValueType()
47 const ValueTypeByHwMode &VVT = RC.getValueTypeNum(0); in getRegisterValueType() local
48 assert(VVT.isSimple() && VVT.getSimple().SimpleTy == VT && in getRegisterValueType()
H A DCodeGenDAGPatterns.cpp91 insert(VVT); in TypeSetByHwMode()
107 ValueTypeByHwMode VVT; in getValueTypeByHwMode() local
108 VVT.PtrAddrSpace = AddrSpace; in getValueTypeByHwMode()
114 return VVT; in getValueTypeByHwMode()
129 for (const auto &P : VVT) { in insert()
144 if (!VVT.hasMode(I.first)) in insert()
647 TypeSetByHwMode Tmp(VVT); in EnforceVectorEltTypeIs()
1536 for (const auto &P : VVT) in SDTypeConstraint()
1568 for (const auto &P : VVT) { in SDTypeConstraint()
2488 for (auto &P : VVT) { in ApplyTypeConstraints()
[all …]
H A DRegisterInfoEmitter.cpp1239 for (const ValueTypeByHwMode &VVT : RC.VTs) in runTargetDesc() local
1240 if (VVT.hasDefault() || VVT.hasMode(M)) in runTargetDesc()
1241 S.push_back(VVT.get(M).SimpleTy); in runTargetDesc()
1290 for (const ValueTypeByHwMode &VVT : RC.VTs) in runTargetDesc() local
1291 if (VVT.hasDefault() || VVT.hasMode(M)) in runTargetDesc()
1292 VTs.push_back(VVT.get(M).SimpleTy); in runTargetDesc()
H A DFastISelEmitter.cpp177 ValueTypeByHwMode VVT = TP->getTree(0)->getType(0); in emitImmediatePredicate() local
178 assert(VVT.isSimple() && in emitImmediatePredicate()
180 OS << "VT == " << getEnumName(VVT.getSimple().SimpleTy) << " && "; in emitImmediatePredicate()
H A DCodeGenDAGPatterns.h237 bool insert(const ValueTypeByHwMode &VVT);
312 const ValueTypeByHwMode &VVT);
408 ValueTypeByHwMode VVT; member
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp2251 EVT VVT = SubOp.getNode()->getValueType(0); in LowerCONCAT_VECTORS() local
2252 EVT EltVT = VVT.getVectorElementType(); in LowerCONCAT_VECTORS()
2253 unsigned NumSubElem = VVT.getVectorNumElements(); in LowerCONCAT_VECTORS()
5775 EVT VVT; in ReplaceLoadVector() local
5778 VVT = MVT::v2f16; in ReplaceLoadVector()
5781 VVT = MVT::v2bf16; in ReplaceLoadVector()
5784 VVT = MVT::v2i16; in ReplaceLoadVector()
5789 EVT ListVTs[] = {VVT, VVT, VVT, VVT, MVT::Other}; in ReplaceLoadVector()
/freebsd-14.2/contrib/llvm-project/clang/lib/CodeGen/
H A DCGExprScalar.cpp1904 llvm::VectorType *VVT = dyn_cast<llvm::VectorType>(Init->getType()); in VisitInitListExpr() local
1909 if (!VVT) { in VisitInitListExpr()
1952 unsigned InitElts = cast<llvm::FixedVectorType>(VVT)->getNumElements(); in VisitInitListExpr()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp18764 SDValue VVT = DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, V); in PerformMVEExtCombine() local
18766 ? DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, VT, VVT, in PerformMVEExtCombine()
18768 : DAG.getZeroExtendInReg(VVT, DL, ExtVT); in PerformMVEExtCombine()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp7236 MVT VVT = MVT::getVectorVT(VT.getScalarType(), NumElm); in lowerBuildVectorAsBroadcast() local
7243 Ops, VVT, MPI, Alignment, in lowerBuildVectorAsBroadcast()