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Searched refs:VOffset (Results 1 – 9 of 9) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCCodeEmitter.cpp723 unsigned VOffset = 0; in getMachineOpValue() local
742 ++VOffset; in getMachineOpValue()
764 unsigned Offset = HexagonMCInstrInfo::isVector(MCII, MI) ? VOffset in getMachineOpValue()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstructionSelector.cpp3252 Register VOffset = MI.getOperand(4 + OpOffset).getReg(); in selectBufferLoadLds() local
3254 getIConstantVRegValWithLookThrough(VOffset, *MRI); in selectBufferLoadLds()
3292 .addReg(VOffset) in selectBufferLoadLds()
3299 MIB.addReg(VOffset); in selectBufferLoadLds()
3375 Register VOffset; in selectGlobalLoadLds() local
3389 VOffset = Off; in selectGlobalLoadLds()
3397 if (!VOffset) { in selectGlobalLoadLds()
3398 VOffset = MRI->createVirtualRegister(&AMDGPU::VGPR_32RegClass); in selectGlobalLoadLds()
3399 BuildMI(*MBB, &MI, DL, TII.get(AMDGPU::V_MOV_B32_e32), VOffset) in selectGlobalLoadLds()
3408 MIB.addReg(VOffset); in selectGlobalLoadLds()
[all …]
H A DAMDGPULegalizerInfo.cpp5634 Register VOffset = MI.getOperand(3 + OpOffset).getReg(); in legalizeBufferStore() local
5645 std::tie(VOffset, ImmOffset) = splitBufferOffsets(B, VOffset); in legalizeBufferStore()
5672 .addUse(VOffset) // voffset in legalizeBufferStore()
5696 .addUse(VOffset) // voffset in buildBufferLoad()
5745 Register VOffset = MI.getOperand(3 + OpOffset).getReg(); in legalizeBufferLoad() local
5768 std::tie(VOffset, ImmOffset) = splitBufferOffsets(B, VOffset); in legalizeBufferLoad()
5808 buildBufferLoad(Opc, LoadDstReg, RSrc, VIndex, VOffset, SOffset, ImmOffset, in legalizeBufferLoad()
5824 buildBufferLoad(Opc, LoadDstReg, RSrc, VIndex, VOffset, SOffset, ImmOffset, in legalizeBufferLoad()
5978 Register VOffset = MI.getOperand(4 + OpOffset).getReg(); in legalizeBufferAtomic() local
5985 std::tie(VOffset, ImmOffset) = splitBufferOffsets(B, VOffset); in legalizeBufferAtomic()
[all …]
H A DAMDGPUISelDAGToDAG.h185 SDValue &VOffset, SDValue &Offset) const;
H A DAMDGPUISelDAGToDAG.cpp1742 SDValue &VOffset, in SelectGlobalSAddr() argument
1772 VOffset = SDValue(VMov, 0); in SelectGlobalSAddr()
1801 VOffset = ZextRHS; in SelectGlobalSAddr()
1809 VOffset = ZextLHS; in SelectGlobalSAddr()
1829 VOffset = SDValue(VMov, 0); in SelectGlobalSAddr()
H A DSIRegisterInfo.cpp1379 int64_t VOffset) { in buildSpillLoadStore() argument
1389 .addImm(VOffset) in buildSpillLoadStore()
1395 .addImm(VOffset) in buildSpillLoadStore()
1401 .addImm(VOffset); in buildSpillLoadStore()
H A DAMDGPURegisterBankInfo.cpp1364 Register VOffset; in applyMappingSBufferLoad() local
1367 unsigned MMOOffset = setBufferOffsets(B, MI.getOperand(2).getReg(), VOffset, in applyMappingSBufferLoad()
1410 .addUse(VOffset) // voffset in applyMappingSBufferLoad()
H A DSIISelLowering.cpp9544 SDValue VOffset = Op.getOperand(5 + OpOffset); in LowerINTRINSIC_VOID() local
9545 bool HasVOffset = !isNullConstant(VOffset); in LowerINTRINSIC_VOID()
9578 VOffset })); in LowerINTRINSIC_VOID()
9582 Ops.push_back(VOffset); in LowerINTRINSIC_VOID()
9646 SDValue VOffset; in LowerINTRINSIC_VOID() local
9660 VOffset = RHS.getOperand(0); in LowerINTRINSIC_VOID()
9667 if (!VOffset) in LowerINTRINSIC_VOID()
9668 VOffset = SDValue( in LowerINTRINSIC_VOID()
9671 Ops.push_back(VOffset); in LowerINTRINSIC_VOID()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp40549 int VOffset = V.getOpcode() == X86ISD::PSHUFLW ? 0 : 4; in combineTargetShuffle() local
40553 WordMask[i + VOffset] = VMask[i] + VOffset; in combineTargetShuffle()